AD565ATD Analog Devices Inc, AD565ATD Datasheet - Page 8

• Manufacturer Part Number: AD565ATD
• Description: IC,D/A CONVERTER,SINGLE,12-BIT,BIPOLAR,DIP,24PIN
• Manufacturer: Analog Devices Inc

Specifications of AD565ATD

• Rohs Status: RoHS non-compliant
• Settling Time: 250ns
• Number Of Bits: 12
• Data Interface: Parallel
• Number Of Converters: 1
• Voltage Supply Source: Single Supply
• Power Dissipation (max): 345mW
• Operating Temperature: -55°C ~ 125°C
• Mounting Type: Through Hole
• Package / Case: 24-CDIP (0.600", 15.24mm)

AD565A/AD566A
CONNECTING THE AD565A FOR BUFFERED VOLTAGE
OUTPUT
The standard current-to-voltage conversion connections using an
operational amplifier are shown in Figures 1, 2, and 3 with the
preferred trimming techniques. If a low offset operational amplifier
(OP77, AD741L, OP07) is used, excellent performance can be
obtained in many situations without trimming (an op amp with
less than 0.5 mV max offset voltage should be used to keep offset
errors below 1/2 LSB). If a 50 Ω fixed resistor is substituted for
the 100 Ω trimmer, unipolar zero is typically within ± 1/2 LSB
(plus op amp offset) and full-scale accuracy is within 0.1%
(0.25% max). Substituting a 50 Ω resistor for the 100 Ω bipo-
lar offset trimmer gives a bipolar zero error typically within
± 2 LSB (0.05%).
The AD509 is recommended for buffered voltage-output
applications that require a settling time to ± 1/2 LSB of
1 µs. The feedback capacitor is shown with the optimum value
for each application; this capacitor is required to compen-
sate for the 25 pF DAC output capacitance.
FIGURE 1. UNIPOLAR CONFIGURATION
This configuration provides a unipolar 0 V to 10 V output
range. In this mode, the bipolar terminal, Pin 8, should be
grounded if not used for trimming.
STEP I . . . ZERO ADJUST
Turn all bits OFF and adjust zero trimmer R1 until the output
reads 0.000 V (1 LSB = 2.44 mV). In most cases, this trim is not
needed, but Pin 8 should then be connected to Pin 12.
STEP II . . . GAIN ADJUST
Turn all bits ON and adjust 100 Ω gain trimmer R2 until the
output is 9.9976 V. (Full scale is adjusted to 1 LSB less than
nominal full scale of 10.000 V.) If a 10.2375 V full scale is desired
(exactly 2.5 mV/bit), insert a 120 Ω resistor in series with the gain
resistor at Pin 10 to the op amp output.
FIGURE 2. BIPOLAR CONFIGURATION
This configuration provides a bipolar output voltage from
–5.000 V to +4.9976 V, with positive full scale occurring with
all bits ON (all 1s).
100
GND
R2
REF
REF
IN
Figure 1. 0 V to 10 V Unipolar Voltage Output
–V
REF
OUT
EE
19.95k
20k
POWER
10V
GND
AD565A
V
CC
0.5mA
I
REF
9.95k
MSB
INPUT
CODE
I
4
OUT
DAC
BIPOLAR OFF
5k
CODE
5k
I
REF
=
I
LSB
O
8k
100
100k
DAC
OUT
10V SPAN
20V SPAN
2.4k
+15V
–15V
10pF
AD509
R1
50k
OUTPUT
0V TO
+10V
–8–
STEP I . . . OFFSET ADJUST
Turn OFF all bits. Adjust 100 Ω trimmer R1 to give –5.000 V
output.
STEP II . . . GAIN ADJUST
Turn ON all bits. Adjust 100 Ω gain trimmer R2 to give a
reading of +4.9976 V.
Please note that it is not necessary to trim the op amp to obtain
full accuracy at room temperature. In most bipolar situations,
an op amp trim is unnecessary unless the untrimmed offset drift
of the op amp is excessive.
FIGURE 3. OTHER VOLTAGE RANGES
The AD565A can also be easily configured for a unipolar 0 V to
+5 V range or ± 2.5 V and ± 10 V bipolar ranges by using the
additional 5 kΩ application resistor provided at the 20 V span R
terminal, Pin 11. For a 5 V span (0 V to +5 V, or ± 2.5 V), the
two 5 kΩ resistors are used in parallel by shorting Pin 11 to Pin 9
and connecting Pin 10 to the op amp output and the bipolar
offset either to ground for unipolar or to REF OUT for the
bipolar offset either to ground for unipolar or to REF OUT for
the bipolar range. For the ± 10 V range (20 V span) use the 5 kΩ
resistors in series by connecting only Pin 11 to the op amp output
and the bipolar offset connected as shown. The ± 10 V option is
shown in Figure 3.
100
100
GND
GND
R2
REF
R2
REF
REF
REF
IN
IN
–V
–V
Figure 2. ± 5 V Bipolar Voltage Output
REF
OUT
EE
REF
OUT
EE
19.95k
19.95k
20k
20k
POWER
POWER
10V
10V
Figure 3. ± 10 V Voltage Output
GND
GND
V
V
AD565A
AD565A
CC
CC
0.5mA
0.5mA
I
I
REF
REF
100
100
9.95k
9.95k
R1
R1
MSB
MSB
INPUT
INPUT
CODE
CODE
I
4
I
4
OUT
OUT
DAC
DAC
BIPOLAR OFF
BIPOLAR OFF
5k
5k
CODE
5k
5k
CODE
I
I
REF
REF
=
=
I
I
LSB
LSB
O
O
8k
8k
DAC
OUT
DAC
OUT
10V SPAN
10V SPAN
20V SPAN
20V SPAN
2.4k
3.0k
10pF
10pF
AD509
AD509
REV.E
OUTPUT
–5V TO
+5V
OUTPUT
–10V TO
+10V