AD12401-326JWS Analog Devices Inc, AD12401-326JWS Datasheet - Page 13

• Manufacturer Part Number: AD12401-326JWS
• Description: IC,A/D CONVERTER,DUAL,12-BIT,MODULE
• Manufacturer: Analog Devices Inc

Specifications of AD12401-326JWS

• Number Of Bits: 12
• Sampling Rate (per Second): 326M
• Data Interface: Parallel
• Number Of Converters: 2
• Power Dissipation (max): 6.8W
• Voltage Supply Source: Analog and Digital
• Operating Temperature: 0°C ~ 60°C
• Package / Case: Module
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

TERMINOLOGY
Analog Bandwidth
The analog input frequency at which the spectral power of the
fundamental frequency (as determined by the FFT analysis) is
reduced by 3 dB.
Aperture Delay
The delay between the 50% point on the rising edge of the
ENCODE command and the instant at which the analog input
is sampled.
Analog Input VSWR (50 Ω)
VSWR is a ratio of the transmitted and reflected signals. The
VSWR can be related to input impedance.
where:
Z
Z
Aperture Uncertainty (Jitter)
The sample-to-sample variation in aperture delay.
Differential Nonlinearity
The deviation of any code width from an ideal 1 LSB step.
Distortion, Image Spur
The ratio of the rms signal amplitude to the rms signal ampli-
tude of the image spur, reported in dBFS. The image spur, a
result of gain and phase errors between two time-interleaved
conversion channels, is located at f
Distortion, Offset Spur
The ratio of the rms signal amplitude to the rms signal ampli-
tude of the offset spur, reported in dBFS. The offset spur, a
result of offset errors between two time-interleaved conversion
channels, is located at f
Effective Number of Bits (ENOB)
Calculated from the measured SNR based on the equation
ENCODE Pulse Width/Duty Cycle
Pulse width high is the minimum amount of time the ENCODE
pulse should be left in Logic 1 state to achieve rated perform-
ance; pulse width low is the minimum time the ENCODE pulse
should be left in low state.
L
S
= reference impedance.
= actual load impedance.
Γ = (Z
VSWR = (1 − |Γ|)/(1 +|Γ|)
ENOB
L
− Z
=
SNR
S
)/(Z
MEASURED
L
+ Z
S
/2.
6
.
S
02
)
−
1
.
76
S
dB
/2 − f
AIN
.
Rev. A | Page 13 of 28
Full-Scale Input Power
Expressed in dBm. Computed using the equation
Full-Scale Input Voltage Range
The maximum peak-to-peak input signal magnitude that results
in a full-scale response, 0 dBFS on a single-tone input signal
case. Any magnitude increase from this value results in an
overrange condition.
Gain Error
The difference between the measured and ideal full-scale input
voltage range of the ADC.
Harmonic Distortion, Second
The ratio of the rms signal amplitude to the rms value of the
second harmonic component, reported in dBFS.
Harmonic Distortion, Third
The ratio of the rms signal amplitude to the rms value of the
third harmonic component, reported in dBFS.
Integral Nonlinearity
The deviation of the transfer function from a reference line
measured in fractions of 1 LSB using a best straight line
determined by a least square curve fit.
Maximum Conversion Rate
The maximum ENCODE rate at which the image spur calibration
degrades no more than 1 dB (when the image spur is 70 dB).
Minimum Conversion Rate
The minimum ENCODE rate at which the image spur calibration
degrades no more than 1 dB (when the image spur is 70 dB).
Offset Error
The dc offset imposed on the input signal by the ADC, reported
in LSB (codes).
Output Propagation Delay
The delay between a differential crossing of ENCODE and
ENCODE (or zero crossing of a single-ended ENCODE).
Pipeline Latency
The number of clock cycles the output data lags the correspond-
ing clock cycle.
Power Supply Rejection Ratio (PSRR)
The ratio of power supply voltage change to the resulting ADC
output voltage change.
POWER
Full-Scale
= 10 log ((V
2
Full-Scale
rms
)/(|Z
INPUT
AD12401
| × 0.001))