A8515GLPTR-T Allegro Microsystems Inc, A8515GLPTR-T Datasheet - Page 21

• Manufacturer Part Number: A8515GLPTR-T
• Description: Backlight Driver For Medium Size LCDs
• Manufacturer: Allegro Microsystems Inc

Specifications of A8515GLPTR-T

• Constant Current: *
• Constant Voltage: *
• Internal Driver: *
• Type - Primary: *
• Type - Secondary: *
• Mounting Type: Surface Mount
• Topology: *
• Number Of Outputs: *
• Frequency: *
• Voltage - Supply: *
• Voltage - Output: *
• Package / Case: 16-TSSOP Exposed Pad, 16-eTSSOP, 16-HTSSOP
• Operating Temperature: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

A8515
Input UVLO
When V
A8515 is enabled. A8515 is disabled when V
t
to avoid shutting down because of momentary glitches in the
input power supply. When V
shut down (see figure 29).
VDD
The VDD pin provides regulated bias supply for internal circuits.
Connect the capacitor C
this pin. The internal LDO can deliver no more than 2 mA of cur-
rent with a typical V
as the pull-up voltage for the ¯ F ¯ ¯ A ¯ ¯ U ¯ ¯ L ¯ ¯ T ¯ pin.
Shutdown
If the PWM pin is pulled low for more than t
enters shutdown mode and clears all internal fault registers. As an
example, at a 2 MHz clock frequency, it will take approximately
16.3 ms to shut down the IC into the low power mode (figure 30).
When the A8515 is shut down, the IC will disable all current
sources and wait until the PWM goes high to re-enable the IC. If
faster shut down is required the FSET pin can be used.
Figure 29. Shutdown showing a falling input voltage (V
(ch1, 2 V/div.), I
(ch4, 2 V/div.), 5 ms/div.
UVLOfall
C1
C2
C3
C4
IN
threshold for more than 50 μs. This small delay is used
and V
OUT
SENSE
(ch2, 200 mA/div.), V
DD
rise above the V
of about 3.5 V, enabling this pin to serve
VDD
IN
with a value of 0.1 μF or greater to
t
falls below 4.35 V, the IC will
DD
(ch3, 5 V/div.), and PWM/EN
UVLOrise
PWML
IN
PWM/EN
falls below the
threshold, the
IN
I
V
V
OUT
); shows V
DD
IN
Wide Input Voltage Range, High Efficiency
, the device
IN
Fault protection during operation
The A8515 constantly monitors the state of the system to deter-
mine if any fault conditions occur during normal operation. The
response to a triggered fault condition is summarized in the Fault
Mode table, on the next page.
It is important to note that there are several points at which the
A8515 monitors for faults during operation. The locations are:
input current, switch current, and output voltage switch voltage
and the two LEDx pins. Note: some of the protection features
might not be active during startup, to prevent false triggering of
fault conditions.
The possible fault conditions that the device can detect are: Open
LED pin, LED pin shorted to GND, shorted inductor, V
to GND, SW pin shorted to GND, ISET pin shorted to GND, and
input disconnect switch source shorted to GND.
Note: Some of these faults will not be protected if the input
disconnect switch is not being used. An example of this is V
short to GND.
Figure 30. Shutdown using the enable function, showing the 16 ms
delay between the PWM/EN signal and when the VDD and GATE of
the disconnect switch turns off; shows GATE (ch1, 10 V/div.), I
200 mA/div.), V
C1
C2
C3
C4
Fault Tolerant LED Driver
DD
(ch3, 5 V/div.), and PWM/EN (ch4, 2 V/div.), 5 ms/div.
115 Northeast Cutoff
1.508.853.5000; www.allegromicro.com
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 U.S.A.
t
PWM/EN
GATE
I
V
OUT
DD
OUT
OUT
(ch2,
short
OUT
21