A4935KJPTR-T Allegro Microsystems Inc, A4935KJPTR-T Datasheet - Page 18

• Manufacturer Part Number: A4935KJPTR-T
• Description: AUTO THREE-PHASE MOSFET PREDRIVER
• Manufacturer: Allegro Microsystems Inc

Specifications of A4935KJPTR-T

• Configuration: 3 Phase Bridge
• Input Type: PWM
• Delay Time: 90ns
• Number Of Configurations: 1
• Number Of Outputs: 3
• Voltage - Supply: 5.5 V ~ 50 V
• Operating Temperature: -40°C ~ 150°C
• Mounting Type: Surface Mount
• Package / Case: 48-LFQFP Exposed Pad
• Operating Temperature Classification: Automotive
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Peak: -
• High Side Voltage - Max (bootstrap): -
• Lead Free Status / Rohs Status: Compliant
• Other names: 620-1300-2; A4935KJPTR-T

A4935
is set to zero by connecting RDEAD to AGND, the fault blank
time typically defaults to 2 μs.
Cross-Conduction
In some circumstances it is desirable to allow activation of both
high-side and low-side FETs in a single phase of the power
bridge. This can be used, with care, to reduce diode conduction
during synchronous rectification, which improves overall effi-
ciency and reduces electromagnetic emissions.
This mode of operation is also useful for independently control-
ling each phase of a VR motor or to turn on all high-side and low-
side FETs together, to cause a supply short circuit for blowing a
safety fuse.
Cross-conduction can occur only when the internally-generated
dead time is set to zero by connecting RDEAD to AGND and, at
the same time, CCEN is high. If zero internally-generated dead
time is required, but cross-conduction is to be prevented, then
CCEN can be tied to AGND. When the dead time is set to zero
it is still possible for some overlap to be present at the switching
instants due to the relative switching time of the FETs.
Bootstrap Capacitor Selection
The bootstrap capacitors, C
ensure proper operation of the A4935. If the capacitances are too
high, time will be wasted charging the capacitor, resulting in a
limit on the maximum duty cycle and the PWM frequency. If the
capacitances are too low, there can be a large voltage drop at the
time the charge is transferred from C
to charge sharing.
To keep this voltage drop small, the charge in the bootstrap
capacitor, Q
by the gate of the FET, Q
value, and the following formula can be used to calculate the
value for C
therefore:
where V
Q
BOOT
BOOT
BOOT
BOOT
is the voltage across the bootstrap capacitor.
=
:
, should be much larger than the charge required
C
BOOT
C
BOOT
× V
GATE
=
BOOTx
BOOT
Q
. A factor of 20 is a reasonable
GATE
V
, must be correctly selected to
BOOT
= Q
× 20
BOOTx
GATE
to the FET gate, due
× 20 ,
,
Automotive 3-Phase MOSFET Driver
(3)
The voltage drop across the bootstrap capacitor as the FET is
being turned on, ∆V , can be approximated by:
So, for a factor of 20, ∆V would be approximately 5% of V
The maximum voltage across the bootstrap capacitor under
normal operating conditions is V
circumstances the voltage may transiently reach 18 V, the clamp
voltage of the Zener diodes between the Cx and Sx pins. In most
applications, with a good ceramic capacitor the working voltage
can be limited to 16 V.
Bootstrap Charging
It is good practice to ensure the high-side bootstrap capacitor is
completely charged before a high-side PWM cycle is requested.
The time required to charge the capacitor, t
approximated by:
where C
∆V is the required voltage of the bootstrap capacitor.
At power-up and when the drives have been disabled for a long
time, the bootstrap capacitor can be completely discharged. In
this case ∆V can be considered to be the full high-side drive
voltage, 12 V. Otherwise, ∆V is the amount of voltage dropped
during the charge transfer, which should be 400 mV or less.
The capacitor is charged whenever the Sx pin is pulled low and
current flows from VREG through the internal bootstrap diode
circuit to C
Bootstrap Charge Management
The A4935 provides automatic bootstrap capacitor charge
management. The bootstrap capacitor voltage for each phase
is continuously checked to ensure that it is above the bootstrap
under-voltage threshold, V
age drops below this threshold, the A4935 will turn on the neces-
sary low-side FET, and continue charging until the bootstrap
capacitor exceeds the undervoltage threshold plus the hysteresis,
V
7 μs, but may be longer for very large values of bootstrap capaci-
BOOTUV
BOOT
+ V
BOOT
BOOTUVhys
is the value of the bootstrap capacitor, in nF, and
.
t
CHARGE
∆V ≈
. The minimum charge time is typically
BOOTUV
115 Northeast Cutoff
1.508.853.5000; www.allegromicro.com
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 U.S.A.
=
C
Q
C
BOOT
BOOT
GATE
REG
100
. If the bootstrap capacitor volt-
(max). However, in some
× ∆V
.
CHARGE
,
(μs), is
BOOT
(4)
(5)
18
.