PAC-SYSPOWR1220AT8 Lattice, PAC-SYSPOWR1220AT8 Datasheet - Page 3

• Manufacturer Part Number: PAC-SYSPOWR1220AT8
• Description: MCU, MPU & DSP Development Tools ispPAC Pwr Mgr 1220A T8 Design System
• Manufacturer: Lattice

Specifications of PAC-SYSPOWR1220AT8

• Processor To Be Evaluated: ispPACPOWR1220AT8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Controls and Indicators
Two momentary switches, S2 and S3, are provided on the evaluation board. They are connected to IN4 and IN5,
respectively. An 8-position dipswitch (S1) is provided on the evaluation board for the purpose of setting device
inputs. Table 1 shows the options controlled by each switch:
Table 1. Switch S1 User Configuration Functions
Switch positions 1 through 6 control logic inputs. When the switch is turned ON, the corresponding logic input goes
HIGH. If a logic input is to be driven from an external signal source, then its associated DIP switch should be set to
the OFF position.
Switch positions 1 and 2 control Voltage Profile Select pins VPS1 and VPS0, respectively. If the device has been
programmed for voltage profile control via VPS0 and VPS1, then these switches are used to select the active volt-
age profile.
Switch position 3 controls the TDI selector pin, TDISEL. This switch should be in the ON position in order to pro-
gram the device through J4.
Switch positions 4-6 control logic inputs IN1-IN3, respectively.
When in the ON position, switches 7 and 8 connect VMON11 and VMON12 to the two linear potentiometers pro-
vided on the board. This lets the user interactively apply analog voltages to the VMON11 and VMON12 inputs with-
out the use of additional hardware. Note that the ground-sense pins for VMON11 and VMON12 have been
hardwired to ground in order to support this feature.
Several red LEDs are also provided on the evaluation board to indicate proper function and as aids to debugging.
LED D2 indicates that the on-board 3.3V supply is powered up. LED D3 is connected to the ispPAC-
POWR1220AT8 device’s TDO line, and will briefly flash when downloading, indicating that download data has
made it to the device.
LEDs are also provided on digital outputs OUT5 through OUT20 so that a user may easily monitor the progress of
sequence programs run on the evaluation board. Each of these LEDs uses a dual-resistor bias circuit that provides
CMOS-3.3V compatible logic levels.
Schematics
The following four figures comprise the schematics for the ispPAC-POWR1220AT8-EV evaluation board. Figure 3
shows the on-board power-supply circuitry, Figure 4 shows the LED display and I
shows user control circuits, while Figure 6 shows connections to the device itself.
Position
1
2
3
4
5
6
7
8
VPS1 – Voltage Profile Select bit 1
VPS0 – Voltage Profile Select bit 0
TDISEL
IN1
IN2
IN3
VMON12_POT
VMON11_POT
Function (when ON)
3
PAC-POWR1220AT8-EV Evaluation Board
2
C adapter circuitry, Figure 5