LFE2-50E-D-EVN Lattice, LFE2-50E-D-EVN Datasheet - Page 26

no-image

LFE2-50E-D-EVN

Manufacturer Part Number
LFE2-50E-D-EVN
Description
MCU, MPU & DSP Development Tools LatticeMico32/DSP DEV BD/LatticeECP2
Manufacturer
Lattice
Datasheet

Specifications of LFE2-50E-D-EVN

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lattice Semiconductor
FPGA Pin Information
Table 33. Pin Table
M24
N23
M22
K21
K20
M21
K22
M20
L22
L21
B24
C23
D25
B25
C26
C25
D24
W4
W3
Y3
AA22
AC24
W20
AD24
V22
Y24
AC3
AA8
AA5
AB4
AD25
AB24
V19
Y25
W23
AB25
AD10
AB11
AC10
AC14
AD14
AB10
AB12
Pin Name
SEG_A#
SEG_B#
SEG_B#
SEG_CA0#
SEG_CA0#
SEG_D#
SEG_DP#
SEG_E#
SEG_F#
SEG_G#
AC97_EAPD
AC97_EXT CLK
AC97_RESET#
AC97_SDATA_IN
AC97_SDATA_OUT
AC97_SYNC
ADC-
ADC+
ADCS
CCLK
CFG0
CFG1
CFG2
CSSPIN
DOUT
EC_TCK
EC_TDI
EC_TDO
EC_TMS
JTAG_DONE
JTAG_INIT
PROGRAM#
SISPI
SPIDO
SPIFASTN#
DDR_A0
DDR_A1
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_A2
AC97_BITCLK
Signal Name
26
LatticeMico32/DSP Development Board
for LatticeECP2 User’s Guide
7-Segment Display
7-Segment Display
7-Segment Display
7-Segment Display
7-Segment Display
7-Segment Display
7-Segment Display
7-Segment Display
7-Segment Display
7-Segment Display
AC97 Audio Codec
AC97 Audio Codec
AC97 Audio Codec
AC97 Audio Codec
AC97 Audio Codec
AC97 Audio Codec
AC97 Audio Codec
Analog Digital Converter
Analog Digital Converter
Analog Digital Converter
Configuration
Configuration
Configuration
Configuration
Configuration
Configuration
Configuration
Configuration
Configuration
Configuration
Configuration
Configuration
Configuration
Configuration
Configuration
Configuration
DDR SDRAM
DDR SDRAM
DDR SDRAM
DDR SDRAM
DDR SDRAM
DDR SDRAM
DDR SDRAM
Area

Related parts for LFE2-50E-D-EVN