LPD-SOM-CLIP1 Logic, LPD-SOM-CLIP1 Datasheet - Page 31

• Manufacturer Part Number: LPD-SOM-CLIP1
• Description: CLIP RETENTION PLATE
• Manufacturer: Logic

Specifications of LPD-SOM-CLIP1

• Accessory Type: Retention Clip
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: SOM-M1
• Other names: 460-3502

J2 Pin# SOM Net Name
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
PN 1013755 Rev 5
MAIN_BATT_IN
DGND
DGND
uP_EMIFA_A13
RFU
ETHER_SPEED_LED —
RFU
RFU
uP_SPI1_SCSn6
RFU
uP_SPI1_SCSn7
ETHER_LINK_ACT_L
EDn
VRTC_IN
3.3V_or_1.8V
uP_MCBSP0_CLKR
3.3V_or_1.8V
uP_MCBSP0_CLKS
uP_SPI1_ENAn
uP_MCBSP0_FSX
ETHER_TX+
uP_MCBSP0_DR
ETHER_TX-
uP_MCBSP0_DX
ETHER_RX+
uP_MCBSP0_FSR
Logic Product Development Company, All Rights Reserved
PRELIMINARY DOCUMENT—SUBJECT TO CHANGE
Processor Name
—
—
—
EMA_A[13]/
GP5[13]
—
—
—
SPI1_SCS[6]/
I2C0_SDA/
TM64P3_OUT12/
GP1[4]
—
SPI1_SCS[7]/
I2C0_SCL/
TM64P2_OUT12/
GP1[15]
—
—
—
AXR6/ CLKR0/
GP1[14]/
MII_TXEN
—
AXR0/
ECAP0_APWM0/
GP8[7]/
MII_TXD[0]/
CLKS0
SPI1_ENA/
GP2[12]
AXR3/ FSX0/
GP1[11]/
MII_TXD[3]
—
AXR2/ DR0/
GP2[10]/
MII_TXD[2]
—
AXR1/ DX0/
GP1[19]/
MII_TXD[1]
—
AXR4/ FSR0/
GP1[12]/ MII_COL
Hi-Z
NA NA
NA NA
NA NA
I/O Voltage
I/O —
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
GND
GND
3.3V or 1.8V
(see Note 1) —
—
3.3V or 1.8V
(see Note 1)
NA
3.3V or 1.8V
(see Note 1)
—
—
3.3V or 1.8V
(see Note 1) —
3.3V or 1.8V
(see Note 1)
3.3V or 1.8V
(see Note 1) —
3.3V or 1.8V
(see Note 1)
3.3V or 1.8V
(see Note 1) 4.7k pull-up on SOM.
3.3V or 1.8V
(see Note 1)
—
3.3V or 1.8V
(see Note 1)
—
3.3V or 1.8V
(see Note 1)
—
3.3V or 1.8V
(see Note 1)
OMAP-L138 SOM-M1 Hardware Specification
Description
Designed for a standard lithium battery.
See Section 5.5.1.3
Ground. Connect to digital ground.
Ground. Connect to digital ground.
Reserved for future use. Do not connect.
Connect cathode of Ethernet Speed LED
Reserved for future use. Do not connect.
Reserved for future use. Do not connect.
I2C0 bus is used for communication
between the OMAP-L138 processor and
the TPS65070 PMIC.
4.7k pull-up on SOM.
Reserved for future use. Do not connect.
I2C0 bus is used for communication
between the OMAP-L138 processor and
the TPS65070 PMIC.
4.7k pull-up on SOM.
Connect to cathode of Ethernet Act. LED
4.7k pull-up on SOM.
—
MII bus is used to communicate between
the OMAP-L138 processor and LAN8710
Ethernet PHY on the SOM.
22 ohm series R on SOM.
MII bus is used to communicate between
the OMAP-L138 processor and LAN8710
Ethernet PHY on the SOM.
22 ohm series R on SOM.
MII bus is used to communicate between
the OMAP-L138 processor and LAN8710
Ethernet PHY on the SOM.
49.9 ohm pull-up on SOM.
MII bus is used to communicate between
the OMAP-L138 processor and LAN8710
Ethernet PHY on the SOM.
49.9 ohm pull-up on SOM.
MII bus is used to communicate between
the OMAP-L138 processor and LAN8710
Ethernet PHY on the SOM.
49.9 ohm pull-up on SOM.
MII bus is used to communicate between
the OMAP-L138 processor and LAN8710
Ethernet PHY on the SOM.
4.7k pull-up on SOM.
26