71M6521FEIM-DB Maxim Integrated Products, 71M6521FEIM-DB Datasheet - Page 130

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71M6521FEIM-DB

Manufacturer Part Number
71M6521FEIM-DB
Description
Power Management Modules & Development Tools 71M6521FE DEMO BOARD M6521FE DEMO BOARD
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of 71M6521FEIM-DB

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Note: Only TF0 and TF1 (timer 0 and timer 1 overflow flag) will be automatically cleared by hardware when the service
routine is called (Signals t0ack and t1ack – port ISR – active high when the service routine is called).
The 71M6521 MPU allows seven external interrupts. These are connected as shown in Table 46. The direction of
interrupts 2 and 3 is programmable in the MPU. Interrupts 2 and 3 should be programmed for falling sensitivity, using
the I2FR and I3FR bits of the T2CON register (see Table 6-50).
Revision 1.7
6.3.5.3
IRCON.7
IRCON.6
IRCON.5
IRCON.4
IRCON.3
IRCON.2
IRCON.1
IRCON.0
TCON.7
TCON.6
TCON.5
TCON.4
TCON.3
TCON.2
TCON.1
TCON.0
Bit
Bit
Timer/Counter Control Register (TCON)
Interrupt Request Register (IRCON)
MSB
External Interrupts
MSB
Symbol
Symbol
IEX6
IEX5
IEX4
IEX3
IEX2
TR1
TR0
TF1
TF0
IE1
IE0
IT1
IT0
-
-
-
TF1
Function
Timer 1 overflow flag
Not used for interrupt control
Timer 0 overflow flag
Not used for interrupt control
External interrupt 1 flag
External interrupt 1 type control bit
External interrupt 0 flag
External interrupt 0 type control bit
Function
External interrupt 6 edge flag
External interrupt 5 edge flag
External interrupt 4 edge flag
External interrupt 3 edge flag
External interrupt 2 edge flag
TR1
© Copyright 2005-2007 TERIDIAN Semiconductor Corporation
Table 6-50: The IRCON Bit Functions
IEX6
Table 6-48: The TCON Bit Functions
TF0
Table 6-49: The IRCON Register
Table 6-47: The TCON Register
TERIDIAN Proprietary
IEX5
TR0
IEX4
IE1
IT1
IEX3
71M652X Software User’s Guide
IE0
IEX2
IT0
LSB
LSB
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