PCA9530D NXP Semiconductors, PCA9530D Datasheet
PCA9530D
Specifications of PCA9530D
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PCA9530D Summary of contents
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... To blink LEDs at periods greater than 1.69 second, the bus master (MCU, MPU, DSP, chip set, etc.) must send repeated commands to turn the LED on and off as is currently done when using normal I/O Expanders like the NXP Semiconductors PCF8574 or PCA9554. Any bits not used for controlling the LEDs can be used for General Purpose ...
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... Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA I Packages offered: SO8, TSSOP8 (MSOP8) 3. Ordering information Table 1. Ordering information +85 C amb Type number Topside Package mark Name PCA9530D PCA9530 SO8 PCA9530DP 9530 TSSOP8 [1] Also known as MSOP8. 4. Block diagram PCA9530 SCL INPUT FILTERS SDA V DD POWER-ON RESET RESET OSCILLATOR ...
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... Figure 1 “Block diagram”. slave address fixed Slave address Rev. 03 — 26 February 2009 PCA9530 2 2-bit I C-bus LED dimmer A0 1 LED0 2 PCA9530DP LED1 002aae497 Fig 3. Pin configuration for TSSOP8 (MSOP8) Figure 4. To conserve power R/W hardware selectable 002aae499 © NXP B.V. 2009. All rights reserved. ...
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... NXP Semiconductors The last bit of the address byte defines the operation to be performed. When set to logic 1 a read is selected, while a logic 0 selects a write operation. 6.2 Control register Following the successful acknowledgement of the slave address, the bus master will send a byte to the PCA9530, which will be stored in the Control register. ...
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... NXP Semiconductors 6.3 Register descriptions 6.3.1 INPUT - Input register The INPUT register reflects the state of the device pins. Writes to this register will be acknowledged but will have no effect. Table 4. Bit Symbol Default Remark: The default value ‘X’ is determined by the externally applied logic level (normally logic 1) when used for directly driving LED with pull- ...
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... NXP Semiconductors 6.3.5 PWM1 - Pulse Width Modulation 1 The PWM1 register determines the duty cycle of BLINK1. The outputs are LOW (LED on) when the count is less than the value in PWM1 and HIGH (LED off) when it is greater. If PWM1 is programmed with 00h, then the PWM1 output is always HIGH (LED off). ...
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... NXP Semiconductors 6.6 External RESET A reset can be accomplished by holding the RESET pin LOW for a minimum of t PCA9530 registers and I RESET input is once again HIGH. This input requires a pull-up resistor Characteristics of the I 2 The I C-bus is for 2-way, 2-line communication between different ICs or modules. The two lines are a serial data line (SDA) and a serial clock line (SCL) ...
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... NXP Semiconductors 7.2 System configuration A device generating a message is a ‘transmitter’; a device receiving is the ‘receiver’. The device that controls the message is the ‘master’ and the devices which are controlled by the master are the ‘slaves’ (see SDA SCL ...
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... NXP Semiconductors 7.4 Bus transactions SCL slave address SDA START condition write to register data out from port Fig 10. Write to register slave address SDA START condition acknowledge slave address (cont (repeated) START condition Fig 11. Read from register slave address SDA START condition ...
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... NXP Semiconductors 8. Application design-in information Fig 13. Typical application 8.1 Minimizing I When the I/Os are used to control LEDs, they are normally connected to V resistor as shown in I about 1.2 V less than V I lower than V Designs needing to minimize current consumption, such as battery power applications, ...
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... NXP Semiconductors 8.2 Programming example The following example will show how to set LED0 to blink duty cycle. LED1 will be set to be dimmed their maximum brightness (duty cycle = 25 %). Table 10. Program sequence START PCA9530 address with A0 = LOW PSC0 subaddress + Auto-Increment Set prescaler PSC0 to achieve a period of 1 second: ...
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... NXP Semiconductors 10. Static characteristics Table 12. Static characteristics Symbol Parameter Supplies V supply voltage DD I supply current DD I standby current stb I additional quiescent DD supply current V power-on reset voltage POR Input SCL; input/output SDA V LOW-level input voltage IL V HIGH-level input voltage IH I LOW-level output current ...
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... NXP Semiconductors 20 % (1) percent variation (1) maximum (2) average (3) minimum Fig 16. Typical frequency variation over process 2 3 PCA9530_3 Product data sheet 002aac524 20 % percent variation 100 amb (1) maximum (2) average (3) minimum Fig 17. Typical frequency variation over process at Rev. 03 — 26 February 2009 PCA9530 2 2-bit I C-bus LED dimmer ...
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... NXP Semiconductors 11. Dynamic characteristics Table 13. Dynamic characteristics Symbol Parameter f SCL clock frequency SCL t bus free time between a STOP and BUF START condition t hold time (repeated) START condition HD;STA t set-up time for a repeated START SU;STA condition t set-up time for STOP condition SU;STO ...
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... NXP Semiconductors START SCL SDA RESET 50 % LEDn Fig 18. Definition of RESET timing SDA t BUF t LOW SCL t HD;STA P S Fig 19. Definition of timing PCA9530_3 Product data sheet rec(rst HD;DAT HIGH SU;DAT Rev. 03 — 26 February 2009 PCA9530 2 2-bit I C-bus LED dimmer ACK or read cycle ...
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... NXP Semiconductors protocol SCL SDA Fig 20. I 12. Test information Fig 21. Test circuitry for switching times PCA9530_3 Product data sheet START bit 7 bit 6 condition MSB (A6) (S) (A7 SU;STA LOW HIGH 1 /f SCL t t BUF SU;DAT HD;STA Rise and fall times refer to V and V ...
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... NXP Semiconductors 13. Package outline SO8: plastic small outline package; 8 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Notes 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... NXP Semiconductors TSSOP8: plastic thin shrink small outline package; 8 leads; body width pin 1 index 1 e DIMENSIONS (mm are the original dimensions UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors 14. Handling information All input and output pins are protected against ElectroStatic Discharge (ESD) under normal handling. When handling ensure that the appropriate precautions are taken as described in JESD625-A or equivalent standards. 15. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “ ...
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... NXP Semiconductors • Process issues, such as application of adhesive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave • Solder bath specifications, including temperature and impurities 15.4 Reflow soldering Key characteristics in reflow soldering are: • ...
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... NXP Semiconductors Fig 24. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description” . 16. Abbreviations Table 16. Acronym ACPI CDM DSP DUT ESD GPIO HBM 2 I C-bus I/O LED ...
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... Release date PCA9530_3 20090226 • Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Section 6.6 “External • Figure 10 “Write to • ...
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... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors 20. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Functional description . . . . . . . . . . . . . . . . . . . 3 6.1 Device addressing . . . . . . . . . . . . . . . . . . . . . . 3 6.2 Control register . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2.1 Control register definition . . . . . . . . . . . . . . . . . 4 6.3 Register descriptions . . . . . . . . . . . . . . . . . . . . 5 6.3.1 INPUT - Input register ...