DS3994Z+W Maxim Integrated Products, DS3994Z+W Datasheet - Page 11

• Manufacturer Part Number: DS3994Z+W
• Description: Display Drivers 4-Ch Cold-Cathode Fl uorescent Controller
• Manufacturer: Maxim Integrated Products

Specifications of DS3994Z+W

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

To generate the DPWM signal internally, the DS3994
requires a clock (referred to as the dimming clock) to
set the DPWM frequency. The user can supply the dim-
ming clock by setting POSCS = 1 in CR1 and applying
an external 22.5Hz to 440Hz signal at the POSC pin, or
DS3994’s clock can be generated by the DS3994’s
oscillator (set POSCS = 0 in CR1), in which case the
frequency is set by an external resistor at the POSC
pin. These two dimming clock options are shown in
Figure 3. Regardless of whether the dimming clock is
generated internally or sourced externally, the POSCR0
and POSCR1 bits in CR2 must be set to match the
desired dimming clock frequency.
Table 1. BRIGHT Analog Dimming Input Slope and Voltage Range Configuration
Figure 3. DPWM Source Configuration Options
Figure 4. DPWM Receiver Configuration
______________________________________________________________________________________________________
CR2.7
SIGNAL
DPWM
CONTROL VOLTAGE
ANALOG DIMMING
0
0
1
1
SIGNAL
DPWM
DIMMING FREQUENCY
RESISTOR TO SET THE
22.5Hz TO 440Hz
22.5Hz TO 440Hz
CR3.0
0
1
0
1
0.5V
OR
0.0V
2.0V
OR
3.3V
0.5 to 2V
0.5 to 2V
0 to 3.3V
0 to 3.3V
RANGE
RESISTOR-SET DIMMING CLOCK
POSC
BRIGHT
PSYNC (INPUT)
BRIGHT
PSYNC (OUTPUT)
POSC
Fluorescent Lamp Controller
Negative
Negative
Positive
Positive
SLOPE
4-Channel Cold-Cathode
DIMMING CLOCK
When the DPWM signal is generated internally, its duty
cycle (and, thus, the lamp brightness) is controlled by a
user-applied analog voltage at the BRIGHT input. Users
can select a positive or negative slope for the bright
pin’s dimming input as well as the voltage range. If
SLOPE = 0 in CR3, then the slope is positive. This
means that a BRIGHT voltage less than the minimum
voltage causes the DS3994 to operate with the minimum
burst duty cycle, providing the lowest brightness set-
ting, while any voltage greater than the maximum volt-
age causes a 100% burst duty cycle (i.e., lamps always
being driven), which provides the maximum brightness.
For voltages between the minimum voltage and the
maximum voltage, the duty cycle varies linearly between
the minimum and 100%.
The internally generated DPWM signal is available at
the PSYNC I/O pin (set RGSO = 0 in CR1) for sourcing
to other DS3994s, if any, in the circuit. This allows all
DS3994s in the system to be synchronized to the same
DPWM signal. The DS3994 that is generating the
DPWM signal for other DS3994s in the system is
referred to as the DPWM source.
EXTERNAL
CONTROL VOLTAGE
ANALOG DIMMING
SIGNAL
DPWM
MINIMUM BRIGHTNESS
22.5Hz TO 440Hz
22.5Hz TO 440Hz
0.5V
2.0V
3.3V
0V
Lamp Dimming Control (DPWM)
0.5V
OR
0.0V
2.0V
OR
3.3V
MAXIMUM BRIGHTNESS
EXTERNAL DIMMING CLOCK
BRIGHT
PSYNC (OUTPUT)
POSC
2.0V
0.5V
3.3V
0V
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