CDB5460A Cirrus Logic Inc, CDB5460A Datasheet - Page 41

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CDB5460A

Manufacturer Part Number
CDB5460A
Description
Development Kit
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CDB5460A

Development Tool Type
Hardware - Eval/Demo Board
Kit Contents
Evaluation Board And Software
Mcu Supported Families
CS5460A
Tool / Board Applications
Power Measurement Solution
Peak Reflow Compatible (260 C)
No
Leaded Process Compatible
No
Rohs Compliant
No
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
CS5460A
4.1.7 Register Read/Write
This command informs the state machine that a register access is required. On reads the addressed register is load-
ed into the output buffer and clocked out by SCLK. On writes the data is clocked into the input buffer and transferred
to the addressed register on the 24
DS487F4
W/R
RA[4:0]
B7
0
W/R
B6
0 = Read register
1 = Write register
Write/Read control
Register address bits. Binary encoded 0 to 31. All registers are 24 bits in length.
Address
00000
00001
00010
00011
00100
00101
00110
00111
01000
01001
01010
01011
01100
01101
01110
01111
10000
10001
10010
10111
11000
11001
11010
11011
11100
11101
11111
† These registers are for Internal Use only and should not be written to.
.
.
.
.
Abbreviation
Config
I
I
V
V
Cycle Count
Pulse-Rate
I
V
P
E
I
V
TBC
Poff
Status
I
V
Res
Res
Res
Test
Mask
Res
Ctrl
Res
Res
DCoff
gn
RMS
ACoff
RA4
.
.
.
.
DCoff
gn
RMS
ACoff
B5
th
SCLK.
RA3
B4
Name/Description
Configuration Register.
Current Channel DC Offset Register.
Current Channel Gain Register.
Voltage Channel DC Offset Register.
Voltage Channel Gain Register.
Number of A/D cycles per computation cycle.
Used to set the energy-to-pulse ratio on EOUT (and EDIR).
Instantaneous Current Register (most recent current sample).
Instantaneous Voltage Register (most recent voltage sample).
Instantaneous Power Register (most recent power sample).
Energy Register (accumulated over latest computation cycle).
RMS Current Register (computed over latest computation cycle).
RMS Voltage Register (computed over latest computation cycle).
Timebase Calibration Register.
Power Offset Register.
Status Register.
Current Channel AC Offset Register.
Voltage Channel AC Offset Register.
Reserved †
Reserved †
Reserved †
Reserved †
Mask Register.
Reserved †
Control Register.
Reserved †
Reserved †
.
.
.
.
RA2
B3
RA1
B2
RA0
B1
CS5460A
B0
0
41

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