CDB6420 Cirrus Logic Inc, CDB6420 Datasheet - Page 9

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CDB6420

Manufacturer Part Number
CDB6420
Description
Development Kit
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CDB6420

Silicon Manufacturer
Cirrus Logic
Application Sub Type
Speakerphone
Kit Application Type
Audio / Video / TV
Silicon Core Number
CS6420
Kit Contents
Board
Kit Features
Analog And Digital Patch Area
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
and they are post-compensated internally to pre-
vent any resultant passband droop. The ADCs also
expect a maximum of 1 V
puts (which are biased around 2.12 VDC). A signal
of higher amplitude will clip the ADC input and
may result in poor echo canceller performance. See
the Design Considerations section for more details.
The outputs are delta-sigma digital to analog con-
verters (DACs) and have similar requirements to
the ADCs. The DACs are pre-compensated to ex-
pect a single-pole RC filter with a corner frequency
at 4 kHz. The full scale voltage output from a DAC
is 1 V
2.12 V.
Acoustic Interface
The pins API (pin 20), APO (pin 18), MB (pin 19),
and AO (pin 3) make up the Acoustic Interface. A
block diagram of the Acoustic Interface is shown in
Figure 4.
DS205PP2
NO
17
NI
4
rms
0,6,9.5,12 dB
(2.8 V
PGA
pp
) swinging around a DC bias of
FAR-END
ADC
DAC
rms
(2.8 V
D
S
P
pp
) at their in-
Figure 4. Analog Interface
DAC
ADC
Transmit Path
Receive Path
0,6,9.5,12 dB
API and APO are, respectively, the input and out-
put of the built-in analog pre-amplifier. The pre-
amplifier is an inverting amplifier with a fixed gain
of 34 dB biased around an input offset voltage
(V
plifier after a 1 k resistor. The circuitry connected
to the amplifier input must present low source im-
pedance (<100 ) to the API pin or the gain will be
reduced. When using the pre-amplifier, connecting
a 0.022 F capacitor to ground off APO will pro-
vide the anti-aliasing filter required by the ADC, as
shown in Figure 2. The pre-amplifier may be by-
passed by clearing Mic (Register 0, bit 15) using the
Microcontroller Interface (see Microcontroller In-
terface section), grounding API through a capacitor,
and driving APO directly. In this case, the signal into
APO must be low-pass filtered by a single-pole RC
filter with a corner frequency at 8 kHz (see Figure 3).
Following the pre-amplifier is a programmable an-
alog gain stage (PGA) which is controllable
through the Microcontroller Interface. This gain
off
PGA
) of 2.12 V. APO is the output of the pre-am-
18 APO
1k
NEAR-END
2.12V
BANDGAP
34 dB
3.5V
19 MB
CS6420
AO
3
API
20
9

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