EVK-SH3000USB Semtech, EVK-SH3000USB Datasheet - Page 12
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EVK-SH3000USB
Manufacturer Part Number
EVK-SH3000USB
Description
Tools, Development Kit
Manufacturer
Semtech
Datasheet
1.EVK-SH3000USB.pdf
(19 pages)
Specifications of EVK-SH3000USB
Kit Contents
Evaluation Kit
Tool / Board Applications
MicroBuddy Devices
Development Tool Type
Hardware / Software - Eval/Demo Board
Mcu Supported Families
SH3000
For Use With
SH3000 MicroBuddy
Lead Free Status / RoHS Status
na
HF Clock Settings
This is the HF clock settings window. This window allows the user to configure the High-Frequency Clock module. The
high-frequency clock is used to generate the output clock frequency that is sent directly to the attached CPU.
SH3000 Evaluation Kit User Guide v0.96
SYSTEM MANAGEMENT
A. The title bar changes color to indicate the status of the settings. A green bar indicates that the settings shown are
B. FLL Block, Fine lock - Selects the Fine-Lock setting. If the frequency step is small (less than 256 kHz at the
C. FLL Block, Coarse lock - Selects the Coarse-Lock setting. When the frequency of the FLL is changed, the
D. FLL Block, Enable – Enables the FLL block. This allows the output clock frequency of the MicroBuddy to be
the settings described in the registers table. When the user changes a setting on this page, the bar turns red,
indicating that the settings are different from the register table. Pressing Apply or Change now updates the
register table with the new settings and changes the bar back to green.
undivided output of the HF oscillator), the host may set this bit. The MicroBuddy then performs a successive
approximation algorithm on the 7 least significant bits of the 18-bit DCO Code value, and finds a locked setting in
approximately 5 ms. The clock may experience the maximum frequency fluctuations of only 3.2%.
MicroBuddy performs a successive approximation algorithm on the 18-bit DCO (digitally controlled oscillator)
Code value, and finds a locked setting in approximately 25 ms. The clock may experience frequency fluctuations
of up to 2:1. If neither the fine-freq-lock nor the coarse-freq-lock have been set, then the FLL locks slowly to the
target frequency.
under positive control, meaning that the absolute accuracy of the output clock is directly related to the absolute
accuracy of the FLL source, which is the internal 32.768 kHz clock from the LFO block.
2003-03
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EVK-SH3000USB MicroBuddy™
Copyright ©2002-2003 Semtech Corporation
Evaluation Kit User Guide
www.semtech.co
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