ADNS-2620 Avago Technologies US Inc., ADNS-2620 Datasheet - Page 17

• Manufacturer Part Number: ADNS-2620
• Description: Optical Mouse Sensor,DIP
• Manufacturer: Avago Technologies US Inc.

Specifications of ADNS-2620

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 516-2238-5; ADNS-2620; Q2073278A

Serial Port Timer Timeout
Figure 29. Power-up serial port timer sequence.
If the microprocessor waits at least t
will ensure that the ADNS-2620 has powered up and the
timer has timed out. This assumes that the microprocessor
and the ADNS-2620 share the same power supply. If not,
then the microprocessor must wait for t
2620 V
the ADNS-2620 will be in sync with the microprocessor.
Resync Note
If the microprocessor and the ADNS-2620 get out of sync,
then the data either written or read from the registers will
be incorrect. An easy way to solve this is to use watchdog
timer timeout sequence to resync the parts after an incor-
rect read.
Power-up
ADNS-2620 has an on-chip internal power-up reset (POR)
circuit, which will reset the chip when VDD reaches the
valid value for the chip to function.
CLK
SDIO
Figure 30. ADNS-2620 soft reset sequence timing.
Soft reset will occur when writing 0x80 to the configura-
tion register.
SDIO
Figure 31. Soft reset configuration register writing operation.
17
SCK
SCK
SDIO
V
SCK
DD
DD
valid. Then when the SCK toggles for the address,
Operation
Write
1
1
>t
0
Configuration Register Address
SPTT
1
0
A
6
0
SPTT
Address = 0x41
A
5
0
from V
SPTT
A
4
from ADNS-
0
A
DD
3
valid, it
0
1
D
5
0
D
Soft Reset
ADNS-2620 may also be given the reset command at any
time via the serial I/O port. The timing and transactions
are the same as those just specified for the power-up
mode in the previous section.
The proper way to perform soft reset on ADNS-2620 is:
1. The microcontroller starts the transaction by sending a
2. The digital section is now ready to go. It takes 3 frames for
4
write operation containing the address of the configura-
tion register and the data value of 0x80. Since the reset bit
is set, ADNS-2620 will reset and any other bits written into
the configuration register at this time is properly written
into the Configuration Register. After the chip has been
reset, very quickly, ADNS-2620 will clear the reset bit so
there is no need for the microcontroller to re-write the
Configuration Register to reset it.
the analog section to settle.
Configuration Register Data
D
0
3
D
0
2
Data = 0x0b010XXXXX
D
1
0
Don't Care State
D
0
0
Reset Occurs
here
0
0