ACPL-K370-060E Avago Technologies US Inc., ACPL-K370-060E Datasheet - Page 7

• Manufacturer Part Number: ACPL-K370-060E
• Description: Isolated Volt/Curr Det,IEC+LF
• Manufacturer: Avago Technologies US Inc.

Specifications of ACPL-K370-060E

• Voltage - Isolation: 5000Vrms
• Number Of Channels: 1, Unidirectional
• Current - Output / Channel: 30mA
• Propagation Delay High - Low @ If: 3.7µs
• Input Type: Logic
• Output Type: Open Collector
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (0.268", 6.81mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 7. Switching Specifications
Unless otherwise noted, T
Notes:
1. All typical values are at T
2. The t
3. The t
4. Common mode transient immunity with a logic “High” level is the maximum tolerable (positive) dV
5. In applications where dV
7
Parameter
V
Propagation Delay
Time to Logic Low
at Output
Propagation Delay
Time to Logic High
at Output
Output Rise Time
(10-90%)
Output Fall Time
(90-10%)
V
Propagation Delay
Time to Logic Low
at Output
Propagation Delay
Time to Logic High
at Output
Output Rise Time
(10-90%)
Output Fall Time
(90-10%)
V
Common Mode
Transient Immunity
at Logic High Output
Common Mode
Transient Immunity
at Logic Low Output
CC
CC
CC
edge of the output pulse. C
edge of the output pulse. C
mode pulse, V
is the maximum tolerable (negative) dV
a logic “Low” state (i.e., V
the detector IC from destructive high surge currents. The recommended value for R
V
= 4.5 V
= 3.3 V
= 3 V to 5.5 V
CC
) with a minimum value of 240 :.
PHL
PLH
propagation delay is measured from the 2.5 V level of the leading edge of a 5.0 V input pulse (1 Ps rise time) to the 1.5 V level on the leading
propagation delay is measured from the 2.5 V level of the trailing edge of a 5.0 V input pulse (1 Ps fall time) to the 1.5 V level on the trailing
CM
, to insure that the output will remain in a logic “High” state (i.e., V
A
O
CM
= 25°C unless otherwise stated.
< 0.8 V).
Sym
t
t
t
t
t
t
t
t
|CM
|CM
PHL
PLH
R
F
PHL
PLH
R
F
L
L
/dt may exceed 50 kV / μs (such as when a static discharge occurs), a series resistor, R
A
includes probe and stray wiring capacitance.
includes probe and stray wiring capacitance.
= –40°C to +105°C.
H
L
|
|
Device
ACPL-K370
ACPL-K376
ACPL-K370
ACPL-K376
ACPL-K370
ACPL-K376
ACPL-K370
ACPL-K376
ACPL-K370
ACPL-K376
ACPL-K370
ACPL-K376
ACPL-K370
ACPL-K376
ACPL-K370
ACPL-K376
ACPL-K370
ACPL-K376
ACPL-K370
ACPL-K376
ACPL-K370
ACPL-K376
ACPL-K370
ACPL-K376
ACPL-K370
ACPL-K376
CM
/dt on the trailing edge of the common mode pulse signal, V
Min
Typ
3.7
6.2
3.7
6.3
13.8
13.3
8.5
6.4
25
24
0.3
0.4
4
6.8
4
6.9
19
18.5
12.8
12.5
27
26
0.3
0.5
10
1
1
[1]
Max
7.5
12.5
7.5
12.5
70
70
45
45
7.5
12.5
7.5
12.5
90
90
70
70
O
CC
> 2.0 V). Common mode transient immunity in logic “Low” level
is 240 : per volt of allowable drop in V
Units
Ps
Ps
Ps
Ps
Ps
Ps
Ps
Ps
Ps
Ps
Ps
Ps
Ps
Ps
Ps
Ps
Ps
Ps
Ps
Ps
Ps
Ps
Ps
Ps
kV/Ps
kV/Ps
kV/Ps
Test Conditions/Notes
R
R
R
R
R
R
R
R
R
R
R
R
I
V
I
0.8 V, V
I
0.8 V, V
IN
IN
IN
L
L
L
L
L
L
L
L
L
L
L
L
CM
= 4.7 k:, C
= 1.8 k:, C
= 4.7 k:, C
= 1.8 k:, C
= 4.7 k:, C
= 4.7 k:, C
= 4.7 k:, C
= 1.8 k:, C
= 4.7 k:, C
= 1.8 k:, C
= 4.7 k:, C
= 4.7 k:, C
= 0 mA, R
= 3.11 mA, R
= 1.56 mA, R
= 1500 V; Notes 4, 5
CM
CM
CM
CM
/dt on the leading edge of the common
, to insure that the output will remain in
= 500 V; Notes 4, 5
= 500 V; Notes 4, 5
L
L
L
L
L
L
L
L
L
L
L
L
L
= 4.7 k:, V
CC
= 30 pF
= 30 pF; Note 2
= 15 pF; Note 2
= 30 pF; Note 3
= 15 pF; Note 3
= 30 pF
= 30 pF
= 30 pF; Note 2
= 15 pF; Note 2
= 30 pF; Note 3
= 15 pF; Note 3
= 30 pF
L
L
, should be included to protect
= 4.7 k:, V
= 4.7 k:, V
CC
O,MIN
(between pin 8 and
O,MAX
O,MAX
= 2 V,
=
=
Fig.
10
10
11
11