ADXRS150ABG Analog Devices Inc, ADXRS150ABG Datasheet - Page 9

• Manufacturer Part Number: ADXRS150ABG
• Description: IC GYROSCOPE SGL COND 32CSPBGA
• Manufacturer: Analog Devices Inc

Specifications of ADXRS150ABG

• Rohs Status: RoHS non-compliant
• Range °/s: ±150°/s
• Sensitivity: 12.5mV/°/s
• Typical Bandwidth: 40Hz
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 6mA
• Output Type: Ratiometric
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-CSPBGA
• For Use With: ADXRS150EB - BOARD EVAL FOR ADXRS150

THEORY OF OPERATION
The ADXRS150 operates on the principle of a resonator gyro.
Two polysilicon sensing structures each contain a dither frame,
which is electrostatically driven to resonance. This produces the
necessary velocity element to produce a Coriolis force during
angular rate. At two of the outer extremes of each frame,
orthogonal to the dither motion, movable fingers are placed
between fixed pickoff fingers to form a capacitive pickoff struc-
ture that senses Coriolis motion. The resulting signal is fed to a
series of gain and demodulation stages that produce the electri-
cal rate signal output. The dual-sensor design rejects
external g-forces and vibration. Fabricating the sensor with the
signal conditioning electronics preserves signal integrity in
noisy environments.
The electrostatic resonator requires 14 V to 16 V for operation.
Since only 5 V is typically available in most applications, a
charge pump is included on-chip. If an external 14 V to 16 V
supply is available, the two capacitors on CP1–CP4 can be omit-
ted, and this supply can be connected to CP5 (Pin 7D) with a
100 nF decoupling capacitor in place of the 47 nF.
After the demodulation stage, there is a single-pole low-pass
filter consisting of an internal 9 kΩ resistor (R
external user-supplied capacitor (CMID). A CMID capacitor of
100 nF sets a 400 Hz ± 35% low-pass pole and is used to limit
high frequency artifacts before final amplification. The band-
width limit capacitor, C
and the Setting Bandwidth section).
5V
NOTE THAT INNER ROWS/COLUMNS OF PINS HAVE BEEN OMITTED
FOR CLARITY BUT SHOULD BE CONNECTED IN THE APPLICATION.
22nF
CP1
CP2
Figure 22. Example Application Circuit (Top View)
AVCC
RATEOUT
6A
5A
4A
2A
C
OUT
3A
OUT
7B
1B
= 22nF
CP4
, sets the pass bandwidth (see Figure 23
SUMJ
22nF
7C
1C
CP3
100nF
CP5
7D
1D
CMID
100nF
47nF
1E
7E
2.5V
100nF
PDD
AGND
PGND
SEN1
1F
7F
6G
5G
4G
3G
2G
) and an
ST2
ST1
TEMP
Rev. B | Page 9 of 12
SUPPLY AND COMMON CONSIDERATIONS
Only power supplies used for supplying analog circuits are rec-
ommended for powering the ADXRS150. High frequency noise
and transients associated with digital circuit supplies may have
adverse effects on device operation.
Figure 22 shows the recommended connections for the
ADXRS150 where both AVCC and PDD have a separate
decoupling capacitor. These should be placed as close to their
respective pins as possible before routing to the system analog
supply. This will minimize the noise injected by the charge
pump that uses the PDD supply.
It is also recommended to place the charge pump capacitors
connected to the CP1–CP4 pins as close to the part as possible.
These capacitors are used to produce the on-chip high voltage
supply switched at the dither frequency at approximately
14 kHz. Care should be taken to ensure that there is no more
than 50 pF of stray capacitance between CP1–CP4 and ground.
Surface-mount chip capacitors are suitable as long as they are
rated for over 15 V.
SETTING BANDWIDTH
External capacitors CMID and C
with on-chip resistors to create two low-pass filters to limit the
bandwidth of the ADXRS150’s rate response. The –3 dB
frequency set by R
and can be well controlled since R
manufacturing to be 180 kΩ ± 1%. Any external resistor applied
between the RATEOUT (1B,2A) and SUMJ (1C,2C) pins results in
ST2
ST1
ADXRS150
5G
4G
R
f
OUT
OUT
SELF
TEST
AVCC
Figure 23. Block Diagram with External Components
=
=
(
1
CP2
180
/
3A
(
4A 5A
SENSOR
2
22nF
RATE
×
kΩ
+
OUT
100nF
π
5V
CP1
×
PDD
×
and C
PUMP/REG.
R
–
7E
R
RESONATOR LOOP
CHARGE
100nF
EXT
SIGNAL CHANNEL
OUT
2G 1F
AGND
6G
CORIOLIS
) (
OUT
/
PGND
×
DEMOD
7F
180
C
π
is
OUT
OUT
6A 7B 7C
OUT
kΩ
100nF
CP4 CP3 CP5
12V
R
CMID
SEN1
)
are used in combination
≈9kΩ ±35%
+
2.5V REF
22nF
has been trimmed during
R
1D
PTAT
EXT
R
SEN2
7D
)
1C
47nF
180kΩ 1%
ADXRS150
SUMJ
R
OUT
C
OUT
1B
2A
1E
3G TEMP
RATE-
OUT
2.5V