PIC18LF2682-I/SP Microchip Technology, PIC18LF2682-I/SP Datasheet - Page 25
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PIC18LF2682-I/SP
Manufacturer Part Number
PIC18LF2682-I/SP
Description
80KB Flash, 3KB RAM, ECAN, 1024 EEPROM 28 SPDIP .300in TUBE
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PCM18XT0.pdf
(484 pages)
2.PIC18F2221-ISO.pdf
(46 pages)
3.PIC18F2682-ISP.pdf
(6 pages)
4.PIC18F2682-ISP.pdf
(4 pages)
Specifications of PIC18LF2682-I/SP
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
80KB (40K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.25 KB
Interface Type
EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
28
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
- PCM18XT0 PDF datasheet
- PIC18F2221-ISO PDF datasheet #2
- PIC18F2682-ISP PDF datasheet #3
- PIC18F2682-ISP PDF datasheet #4
- Current page: 25 of 484
- Download datasheet (9Mb)
2.0
2.1
PIC18F2682/2685/4682/4685 devices can be operated
in ten different oscillator modes. The user can program
the Configuration bits, FOSC3:FOSC0, in Configuration
Register 1H to select one of these ten modes:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. ECIO
2.2
In XT, LP, HS or HSPLL Oscillator modes, a crystal or
ceramic resonator is connected to the OSC1 and
OSC2 pins to establish oscillation. Figure 2-1 shows
the pin connections.
The oscillator design requires the use of a parallel cut
crystal.
© 2009 Microchip Technology Inc.
Note:
LP
XT
HS
HSPLL High-Speed Crystal/Resonator
RC
RCIO
INTIO1 Internal Oscillator with F
INTIO2 Internal Oscillator with I/O on RA6
EC
OSCILLATOR
CONFIGURATIONS
Oscillator Types
Crystal Oscillator/Ceramic
Resonators
Use of a series cut crystal may give a
frequency out of the crystal manufacturer’s
specifications.
Low-Power Crystal
Crystal/Resonator
High-Speed Crystal/Resonator
with PLL enabled
External Resistor/Capacitor with
F
External Resistor/Capacitor with I/O
on RA6
on RA6 and I/O on RA7
and RA7
External Clock with F
External Clock with I/O on RA6
OSC
/4 output on RA6
OSC
OSC
/4 output
/4 output
PIC18F2682/2685/4682/4685
FIGURE 2-1:
TABLE 2-1:
Capacitor values are for design guidance only.
These capacitors were tested with the resonators
listed below for basic start-up and operation. These
values are not optimized.
Different capacitor values may be required to produce
acceptable oscillator operation. The user should test
the performance of the oscillator over the expected
V
See the notes on page 26 for additional information.
Note 1:See Table 2-1 and Table 2-2 for initial values of
DD
Note:
Mode
HS
XT
and temperature range for the application.
C1
C2
2: A series resistor (R
3: R
455 kHz
2.0 MHz
(1)
(1)
Typical Capacitor Values Used:
C1 and C2.
strip cut crystals.
When using resonators with frequencies
above 3.5 MHz, the use of HS mode,
rather than XT mode, is recommended.
HS mode may be used at any V
which the controller is rated. If HS is
selected, it is possible that the gain of the
oscillator will overdrive the resonator.
Therefore, a series resistor should be
placed between the OSC2 pin and the
resonator. As a good starting point, the
recommended value of R
F
16.0 MHz
varies with the oscillator mode chosen.
XTAL
R
455 kHz
2.0 MHz
4.0 MHz
8.0 MHz
S
Freq
(2)
Resonators Used:
CAPACITOR SELECTION FOR
CERAMIC RESONATORS
OSC2
OSC1
16.0 MHz
CRYSTAL/CERAMIC
RESONATOR OPERATION
(XT, LP, HS OR HSPLL
CONFIGURATION)
S
) may be required for AT
OSC1
56 pF
47 pF
33 pF
27 pF
22 pF
R
F
(3)
PIC18FXXXX
4.0 MHz
8.0 MHz
DS39761C-page 25
S
is 330Ω.
Sleep
OSC2
56 pF
47 pF
33 pF
27 pF
22 pF
To
Internal
Logic
DD
for
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