PIC18LF2480T-I/ML Microchip Technology, PIC18LF2480T-I/ML Datasheet - Page 177
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,28PIN,PLASTIC](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC18LF2480T-I/ML
Manufacturer Part Number
PIC18LF2480T-I/ML
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F2221-ISO.pdf
(46 pages)
3.PIC18F4480-IPT.pdf
(490 pages)
4.PIC18LF2480-ISP.pdf
(14 pages)
Specifications of PIC18LF2480T-I/ML
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SPI, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163011, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC18F2221-ISO PDF datasheet #2
- PIC18F4480-IPT PDF datasheet #3
- PIC18LF2480-ISP PDF datasheet #4
- Current page: 177 of 490
- Download datasheet (9Mb)
17.0
In PIC18F4480/4580 devices, ECCP1 is implemented
as a standard CCP module with Enhanced PWM
capabilities. These include the provision for 2 or
4 output channels, user-selectable polarity, dead-band
control and automatic shutdown and restart. The
REGISTER 17-1:
© 2009 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-4
bit 3-0
Note:
EPWM1M1
R/W-0
ENHANCED
CAPTURE/COMPARE/PWM
(ECCP) MODULE
The ECCP1 module is implemented only
in PIC18F4X80 (40/44-pin) devices.
EPWM1M<1:0>: Enhanced PWM Output Configuration bits
If ECCP1M<3:2> = 00, 01, 10:
xx = P1A assigned as Capture/Compare input/output; P1B, P1C, P1D assigned as port pins
If ECCP1M<3:2> = 11:
00 = Single output: P1A modulated; P1B, P1C, P1D assigned as port pins
01 = Full-bridge output forward: P1D modulated; P1A active; P1B, P1C inactive
10 = Half-bridge output: P1A, P1B modulated with dead-band control; P1C, P1D assigned as port pins
11 = Full-bridge output reverse: P1B modulated; P1C active; P1A, P1D inactive
EDC1B<1:0>: ECCP1 Module PWM Duty Cycle bit 1 and bit 0
Capture mode:
Unused.
Compare mode:
Unused.
PWM mode:
These bits are the two LSbs of the 10-bit PWM duty cycle. The eight MSbs of the duty cycle are found
in ECCPR1L.
ECCP1M<3:0>: Enhanced CCP1 Mode Select bits
0000 = Capture/Compare/PWM off (resets ECCP1 module)
0001 = Reserved
0010 = Compare mode; toggle output on match
0011 = Reserved
0100 = Capture mode; every falling edge
0101 = Capture mode; every rising edge
0110 = Capture mode; every 4th rising edge
0111 = Capture mode; every 16th rising edge
1000 = Compare mode; initialize ECCP1 pin low; set output on compare match (set ECCP1IF)
1001 = Compare mode; initialize ECCP1 pin high; clear output on compare match (set ECCP1IF)
1010 = Compare mode; generate software interrupt only; ECCP1 pin reverts to I/O state
1011 = Compare mode; trigger special event (ECCP1 resets TMR1 or TMR3, sets ECCP1IF bit and
1100 = PWM mode; P1A, P1C active-high; P1B, P1D active-high
1101 = PWM mode; P1A, P1C active-high; P1B, P1D active-low
1110 = PWM mode; P1A, P1C active-low; P1B, P1D active-high
1111 = PWM mode; P1A, P1C active-low; P1B, P1D active-low
EPWM1M0
R/W-0
ECCP1CON REGISTER (ECCP1 MODULE, PIC18F4480/4580 DEVICES)
starts the A/D conversion on ECCP1 match)
W = Writable bit
‘1’ = Bit is set
EDC1B1
R/W-0
PIC18F2480/2580/4480/4580
EDC1B0
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
ECCP1M3
R/W-0
Enhanced features are discussed in detail in
Section 17.4 “Enhanced PWM Mode”. Capture,
Compare and single-output PWM functions of the
ECCP module are the same as described for the
standard CCP module.
The control register for the Enhanced CCP module is
shown in Register 17-1. It differs from the CCP1CON
register in PIC18F2480/2580 devices in that the two
Most Significant bits are implemented to control PWM
functionality.
ECCP1M2
R/W-0
x = Bit is unknown
ECCP1M1
R/W-0
DS39637D-page 177
ECCP1M0
R/W-0
bit 0
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