PIC18F8621-E/PT Microchip Technology, PIC18F8621-E/PT Datasheet - Page 45

• Manufacturer Part Number: PIC18F8621-E/PT
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,80PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F8621-E/PT

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.75K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 80-TFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REGISTER 4-2:
FIGURE 4-4:
4.2.3
Since the Top-of-Stack (TOS) is readable and writable,
the ability to push values onto the stack and pull values
off the stack, without disturbing normal program
execution, is a desirable option. To push the current PC
value onto the stack, a PUSH instruction can be
executed. This will increment the Stack Pointer and
load the current PC value onto the stack. TOSU, TOSH
and TOSL can then be modified to place a return
address on the stack.
The ability to pull the TOS value off of the stack and
replace it with the value that was previously pushed
onto the stack, without disturbing normal execution, is
achieved by using the POP instruction. The POP
instruction discards the current TOS by decrementing
the Stack Pointer. The previous value pushed onto the
stack then becomes the TOS value.
 2005 Microchip Technology Inc.
bit 7
bit 6
bit 5
bit 4-0
PUSH AND POP INSTRUCTIONS
TOSU
STKPTR: STACK POINTER REGISTER
RETURN ADDRESS STACK AND ASSOCIATED REGISTERS
0x00
STKFUL: Stack Full Flag bit
1 = Stack became full or overflowed
0 = Stack has not become full or overflowed
STKUNF: Stack Underflow Flag bit
1 = Stack underflow occurred
0 = Stack underflow did not occur
Unimplemented: Read as ‘0’
SP4:SP0: Stack Pointer Location bits
Legend:
R = Readable bit
-n = Value at POR
bit 7
STKFUL
Note 1: Bit 7 and bit 6 can only be cleared in user software or by a POR.
R/C-0
(1)
TOSH
STKUNF
0x1A
R/C-0
PIC18F6525/6621/8525/8621
(1)
Top-of-Stack
TOSL
0x34
(1)
W = Writable bit
‘1’ = Bit is set
U-0
—
Return Address Stack
(1)
R/W-0
4.2.4
These Resets are enabled by programming the
STVREN configuration bit. When the STVREN bit is
disabled, a full or underflow condition will set the
appropriate STKFUL or STKUNF bit, but not cause a
device Reset. When the STVREN bit is enabled, a full
or underflow condition will set the appropriate STKFUL
or STKUNF bit and then cause a device Reset. The
STKFUL or STKUNF bits are only cleared by the user
software or a Power-on Reset.
0x001A34
0x000D58
SP4
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
STACK FULL/UNDERFLOW RESETS
11111
11110
11101
00011
00010
00001
00000
SP3
STKPTR<4:0>
R/W-0
SP2
00010
x = Bit is unknown
R/W-0
SP1
DS39612B-page 43
R/W-0
SP0
bit 0