PIC18F1230-I/SS Microchip Technology, PIC18F1230-I/SS Datasheet - Page 177

• Manufacturer Part Number: PIC18F1230-I/SS
• Description: Microcontroller
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F1230-I/SS

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 4KB (2K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SSOP
• Package: 20SSOP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 16
• Interface Type: USART
• On-chip Adc: 4-chx10-bit
• Number Of Timers: 2
• Processor Series: PIC18F
• Core: PIC
• Data Ram Size: 256 B
• Maximum Clock Frequency: 40 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164307 - MODULE SKT FOR PM3 28SSOP
• Lead Free Status / Rohs Status: Details

16.7
Figure 16-4 shows the operation of the A/D Converter
after the GO/DONE bit has been set and the
ACQT2:ACQT0 bits are cleared. A conversion is
started after the following instruction to allow entry into
Sleep mode before the conversion begins.
Figure 16-5 shows the operation of the A/D Converter
after the GO/DONE bit has been set, the ACQT2:ACQT0
bits are set to ‘010’ and a 4 T
selected before the conversion starts.
Clearing the GO/DONE bit during a conversion will abort
the current conversion. The A/D Result register pair will
NOT be updated with the partially completed A/D
conversion
ADRESH:ADRESL registers will continue to contain the
value of the last completed conversion (or the last value
written to the ADRESH:ADRESL registers).
FIGURE 16-4:
FIGURE 16-5:
 2009 Microchip Technology Inc.
(Holding capacitor continues
acquiring input)
Set GO/DONE bit
1
T
Set GO/DONE bit
CY
A/D Conversions
Holding capacitor is disconnected from analog input (typically 100 ns)
T
ACQT
– T
Acquisition
Automatic
2
AD
Time
sample.
Conversion starts
Cycles
T
AD
3
1 T
A/D CONVERSION T
A/D CONVERSION T
AD
b9
This
4
2 T
Conversion starts
(Holding capacitor is disconnected)
AD
b8
AD
1
means
3 T
acquisition time is
AD
b7
b9
2
4 T
that
AD
b6
On the following cycle:
ADRESH:ADRESL are loaded, GO/DONE bit is cleared,
ADIF bit is set, holding capacitor is connected to analog input.
b8
3
AD
AD
5 T
On the following cycle:
ADRESH:ADRESL are loaded, GO/DONE bit is cleared,
ADIF bit is set, holding capacitor is connected to analog input.
CYCLES (ACQT<2:0> = 000, T
CYCLES (ACQT<2:0> = 010, T
the
AD
b5
b7
4
6 T
AD
b4
T
b6
5
AD
7 T
Cycles
After the A/D conversion is completed or aborted, a
2 T
be started. After this wait, acquisition on the selected
channel is automatically started.
16.8
The discharge phase is used to initialize the value of
the capacitor array. The array is discharged before
every sample. This feature helps to optimize the unity-
gain amplifier, as the circuit always needs to charge the
capacitor array, rather than charge/discharge based on
previous measure values.
AD
b3
Note:
b5
AD
6
8
wait is required before the next acquisition can
T
AD
b2
Discharge
b4
PIC18F1230/1330
7
9 T
The GO/DONE bit should NOT be set in
the same instruction that turns on the A/D.
AD
b1
b3
8
10
T
AD
b0
ACQ
ACQ
b2
9
11
= 0)
T
= 4 T
AD
Discharge
10
b1
1
AD
DS39758D-page 177
b0
)
11
T
Discharge
AD
1