PIC18F1230-I/SS Microchip Technology, PIC18F1230-I/SS Datasheet - Page 134

Microcontroller

PIC18F1230-I/SS

Manufacturer Part Number
PIC18F1230-I/SS
Description
Microcontroller
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F1230-I/SS

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP
Package
20SSOP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
16
Interface Type
USART
On-chip Adc
4-chx10-bit
Number Of Timers
2
Processor Series
PIC18F
Core
PIC
Data Ram Size
256 B
Maximum Clock Frequency
40 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164307 - MODULE SKT FOR PM3 28SSOP
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F1230-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC18F1230/1330
14.6.5
The Complementary mode of PWM operation is useful
to drive one or more power switches in half-bridge
configuration, as shown in Figure 14-16. This inverter
topology is typical for a 3-phase induction motor,
brushless DC motor or 3-phase Uninterruptible Power
Supply (UPS) control applications.
Each upper/lower power switch pair is fed by a
complementary PWM signal. Dead time may be
optionally inserted during device switching, where both
outputs are inactive for a short period (see
Section 14.7 “Dead-Time Generators”).
In Complementary mode, the duty cycle comparison
units are assigned to the PWM outputs as follows:
• PDC0 register controls PWM1/PWM0 outputs
• PDC1 register controls PWM3/PWM2 outputs
• PDC2 register controls PWM5/PWM4 outputs
PWM1/3/5 are the main PWMs that are controlled by
the
complemented outputs. When using the PWMs to
control the half-bridge, the odd number PWMs can be
used to control the upper power switch and the even
numbered PWMs can be used for the lower switches.
DS39758D-page 134
PDCx
COMPLEMENTARY PWM
OPERATION
registers
and
PWM0/2/4
are
the
FIGURE 14-16:
The Complementary mode is selected for each PWM
I/O pin pair by clearing the appropriate PMODx bit in
the PWMCON0 register. The PWM I/O pins are set to
Complementary mode by default upon all kinds of
device Resets.
+V
TYPICAL LOAD FOR
COMPLEMENTARY PWM
OUTPUTS
 2009 Microchip Technology Inc.
3-Phase
Load

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