PIC16LF870T-I/SS Microchip Technology, PIC16LF870T-I/SS Datasheet - Page 84
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PIC16LF870T-I/SS
Manufacturer Part Number
PIC16LF870T-I/SS
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Specifications of PIC16LF870T-I/SS
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC16F870/871
10.1
For the A/D converter to meet its specified accuracy,
the charge holding capacitor (C
to fully charge to the input channel voltage level. The
analog input model is shown in Figure 10-2. The
source impedance (R
switch (R
required to charge the capacitor C
switch (R
(V
mended impedance for analog sources is 10 k . As
the impedance is decreased, the acquisition time may
EQUATION 10-1:
FIGURE 10-2:
DS30569B-page 82
T
T
T
DD
ACQ
C
ACQ
Note 1: The reference voltage (V
), see Figure 10-2. The maximum recom-
2: The charge holding capacitor (C
3: The maximum recommended impedance for analog sources is 10 k . This is required to meet the pin
4: After a conversion has completed, a 2.0 T
A/D Acquisition Requirements
SS
SS
=
=
=
=
=
=
=
=
) impedance varies over the device voltage
leakage specification.
During this time, the holding capacitor is not connected to the selected A/D input channel.
) impedance directly affect the time
Amplifier Settling Time + Hold Capacitor Charging Time + Temperature Coefficient
T
2 s + T
C
- 120 pF (1 k + 7 k + 10 k ) In(0.0004885)
16.47 s
2 s + 16.47 s + [(50°C – 25 C)(0.05 s/ C)
19.72 s
AMP
HOLD
Legend C
+ T
(R
C
VA
C
ACQUISITION TIME
+ [(Temperature – 25°C)(0.05 s/°C)]
ANALOG INPUT MODEL
IC
S
+ T
V
I
R
SS
C
) and the internal sampling
R
+ R
LEAKAGE
T
PIN
IC
HOLD
S
COFF
SS
ANx
+ R
C
5 pF
HOLD
PIN
= input capacitance
= threshold voltage
= leakage current at the pin due to
= interconnect resistance
= sampling switch
= sample/hold capacitance (from DAC)
HOLD
S
) In(1/2047)
various junctions
) must be allowed
REF
. The sampling
) has no effect on the equation, since it cancels itself out.
HOLD
V
DD
V
V
) is not discharged after each conversion.
T
T
= 0.6V
= 0.6V
AD
delay must complete before acquisition can begin again.
I
± 500 nA
LEAKAGE
be decreased. After the analog input channel is
selected (changed), this acquisition must be done
before the conversion can be started.
To
Equation 10-1 may be used. This equation assumes
that 1/2 LSb error is used (1024 steps for the A/D). The
1/2 LSb error is the maximum error allowed for the A/D
to meet its specified resolution.
To calculate the minimum acquisition time, T
the PICmicro™ Mid-Range MCU Family Reference
Manual (DS33023).
R
IC
calculate
1k
V
SS R
DD
Sampling
Switch
6V
5V
4V
3V
2V
SS
the
Sampling Switch
5 6 7 8 9 10 11
V
minimum
2003 Microchip Technology Inc.
C
= DAC capacitance
= 120 pF
SS
(k )
HOLD
acquisition
ACQ
, see
time,
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