PIC16LF76-I/SS Microchip Technology, PIC16LF76-I/SS Datasheet - Page 40
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC16LF76-I/SS
Manufacturer Part Number
PIC16LF76-I/SS
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16LF627A-IP.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC16F73-ISP.pdf
(174 pages)
Specifications of PIC16LF76-I/SS
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PIC16LF76I/SS
- Current page: 40 of 174
- Download datasheet (5Mb)
PIC16F7X
REGISTER 4-1:
DS30325B-page 38
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
TRISE REGISTER (ADDRESS 89h)
bit 7
Parallel Slave Port Status/Control bits:
IBF: Input Buffer Full Status bit
1 = A word has been received and is waiting to be read by the CPU
0 = No word has been received
OBF: Output Buffer Full Status bit
1 = The output buffer still holds a previously written word
0 = The output buffer has been read
IBOV: Input Buffer Overflow Detect bit (in Microprocessor mode)
1 = A write occurred when a previously input word has not been read
0 = No overflow occurred
PSPMODE: Parallel Slave Port Mode Select bit
1 = Parallel Slave Port mode
0 = General Purpose I/O mode
Unimplemented: Read as '0'
PORTE Data Direction bits:
Bit2: Direction Control bit for pin RE2/CS/AN7
1 = Input
0 = Output
Bit1: Direction Control bit for pin RE1/WR/AN6
1 = Input
0 = Output
Bit0: Direction Control bit for pin RE0/RD/AN5
1 = Input
0 = Output
Legend:
R = Readable bit
- n = Value at POR reset
R-0
IBF
(must be cleared in software)
OBF
R-0
R/W-0
IBOV
W = Writable bit
’1’ = Bit is set
PSPMODE
R/W-0
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
U-0
—
2002 Microchip Technology Inc.
R/W-1
Bit2
x = Bit is unknown
R/W-1
Bit1
R/W-1
Bit0
bit 0
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