PIC16LC924-04/L Microchip Technology, PIC16LC924-04/L Datasheet - Page 124

• Manufacturer Part Number: PIC16LC924-04/L
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LDCC,68PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16LC924-04/L

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: I²C, SPI
• Peripherals: LCD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: OTP
• Ram Size: 176 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 6 V
• Data Converters: A/D 5x8b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 68-PLCC
• Processor Series: PIC16LC
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 176 B
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 3
• Operating Supply Voltage: 2.5 V to 6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000
• Minimum Operating Temperature: 0 C
• On-chip Adc: 8 bit, 5 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC16LC924-04/LR; PIC16LC924-04/LR

PIC16C9XX
BTFSS
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example
DS30444E - page 124
If Skip:
Bit Test f, Skip if Set
[ label ] BTFSS f,b
0
0
skip if (f<b>) = 1
None
If bit 'b' in register 'f' is '0' then the next
instruction is executed.
If bit 'b' is '1', then the next instruction is
discarded and a NOP is executed
instead, making this a 2T
1
1(2)
Before Instruction
After Instruction
(2nd Cycle)
Operation
Decode
HERE
FALSE
TRUE
Q1
Q1
01
No-
f
b < 7
127
PC =
if FLAG<1> = 0,
PC =
if FLAG<1> = 1,
PC =
register 'f'
Operation
11bb
BTFSC
GOTO
•
•
•
Read
Q2
Q2
No-
address HERE
address FALSE
address TRUE
FLAG,1
PROCESS_CODE
Operation
Process
bfff
data
Q3
Q3
No-
CY
instruction.
Operation
Operation
ffff
Q4
Q4
No-
No-
CALL
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example
2nd Cycle
1st Cycle
Call Subroutine
[ label ] CALL k
0
(PC)+ 1
k
(PCLATH<4:3>)
None
Call Subroutine. First, return address
(PC+1) is pushed onto the stack. The
eleven bit immediate address is loaded
into PC bits <10:0>. The upper bits of
the PC are loaded from PCLATH. CALL
is a two cycle instruction.
1
2
Before Instruction
After Instruction
Operation
Decode
HERE
Q1
10
No-
k
PC<10:0>,
1997 Microchip Technology Inc.
2047
PC = Address HERE
PC = Address THERE
TOS = Address HERE+1
Operation
literal 'k',
Push PC
to Stack
0kkk
TOS,
CALL
Read
Q2
No-
Operation
THERE
kkkk
Process
PC<12:11>
data
Q3
No-
Operation
kkkk
Write to
Q4
No-
PC