PIC16LC923-04I/L Microchip Technology, PIC16LC923-04I/L Datasheet - Page 33
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PIC16LC923-04I/L
Manufacturer Part Number
PIC16LC923-04I/L
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LDCC,68PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheet
1.PIC16C923-04L.pdf
(189 pages)
Specifications of PIC16LC923-04I/L
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C, SPI
Peripherals
LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
7KB (4K x 14)
Program Memory Type
OTP
Ram Size
176 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
68-PLCC
Processor Series
PIC16LC
Core
PIC
Data Bus Width
8 bit
Data Ram Size
176 B
Interface Type
I2C, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
25
Number Of Timers
3
Operating Supply Voltage
2.5 V to 6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16LC923-04I/L
Manufacturer:
Microchip Technology
Quantity:
10 000
5.2
PORTB is an 8-bit wide bi-directional port. The corre-
sponding data direction register is TRISB. Setting a bit
in the TRISB register puts the corresponding output
driver in a hi-impedance input mode. Clearing a bit in
the TRISB register puts the contents of the output latch
on the selected pin(s).
EXAMPLE 5-2:
BCF
BCF
CLRF
BSF
MOVLW
MOVWF
Each of the PORTB pins has a weak internal pull-up. A
single control bit can turn on all the pull-ups. This is
performed by clearing bit RBPU (OPTION<7>). The
weak pull-up is automatically turned off when the port
pin is configured as an output. The pull-ups are also dis-
abled on a Power-on Reset.
FIGURE 5-3: BLOCK DIAGRAM OF
Four of PORTB’s pins, RB7:RB4, have an interrupt on
change feature. Only pins configured as inputs can
cause this interrupt to occur (i.e. any RB7:RB4 pin con-
figured as an output is excluded from the interrupt on
change comparison). The input pins (of RB7:RB4) are
compared with the old value latched on the last read of
Data bus
WR TRIS
WR Port
RB0/INT
RBPU
1997 Microchip Technology Inc.
Note 1: I/O pins have diode protection to V
(2)
2: To enable weak pull-ups, set the appropriate TRIS bit
STATUS, RP0
STATUS, RP1
PORTB
STATUS, RP0
0xCF
TRISB
and clear the RBPU bit (OPTION<7>).
PORTB and TRISB Register
RB3:RB0 PINS
RD TRIS
RD Port
Data Latch
TRIS Latch
INITIALIZING PORTB
D
D
CK
CK
Schmitt Trigger
Buffer
; Select Bank0
; Initialize PORTB
;
; Value used to
; initialize data
; direction
; Set RB<3:0> as inputs
; RB<5:4> as outputs
; RB<7:6> as inputs
Q
Q
Q
DD
and V
EN
TTL
Input
Buffer
D
SS
.
V
P
RD Port
DD
weak
pull-up
I/O
pin
(1)
PORTB. The “mismatch” outputs of RB7:RB4 are
OR’ed together to generate the RB Port Change Inter-
rupt with flag bit RBIF (INTCON<0>).
This interrupt can wake the device from SLEEP. The
user, in the interrupt service routine, can clear the inter-
rupt in the following manner:
a)
b)
A mismatch condition will continue to set flag bit RBIF.
Reading PORTB will end the mismatch condition, and
allow flag bit RBIF to be cleared.
This interrupt on mismatch feature, together with soft-
ware configurable pull-ups on these four pins allow
easy interface to a keypad and make it possible for
wake-up on key-depression. Refer to the Embedded
Control Handbook, "Implementing Wake-Up on Key
Stroke" (AN552).
The interrupt on change feature is recommended for
wake-up on key depression operation and operations
where PORTB is only used for the interrupt on change
feature. Polling of PORTB is not recommended while
using the interrupt on change feature.
FIGURE 5-4: BLOCK DIAGRAM OF
Data bus
Note 1: I/O pins have diode protection to V
WR Port
WR TRIS
RBPU
RB7:RB6 in serial programming mode
Set RBIF
From other
RB7:RB4 pins
Any read or write of PORTB. This will end the
mismatch condition.
Clear flag bit RBIF.
2: To enable weak pull-ups, set the appropriate TRIS bit
(2)
and clear the RBPU bit (OPTION<7>).
RD TRIS
RD Port
RB7:RB4 PINS
Data Latch
TRIS Latch
D
D
CK
CK
Q
Q
PIC16C9XX
Q
Q
Latch
DD
EN
DS30444E - page 33
EN
D
and V
D
TTL
Input
Buffer
SS
V
P
.
DD
ST
Buffer
weak
pull-up
RD Port
I/O
pin
Q1
Q3
(1)