PIC16LC774-I/PQ Microchip Technology, PIC16LC774-I/PQ Datasheet - Page 85

44 PIN, 7KB OTP, 256 RAM, 33 I/O,

PIC16LC774-I/PQ

Manufacturer Part Number
PIC16LC774-I/PQ
Description
44 PIN, 7KB OTP, 256 RAM, 33 I/O,
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets

Specifications of PIC16LC774-I/PQ

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
7KB (4K x 14)
Program Memory Type
OTP
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-MQFP, 44-PQFP
Processor Series
PIC16LC
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C, SPI, SSP, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
33
Number Of Timers
3 bit
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000, DM163022
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16LC774-I/PQ
Manufacturer:
Microchip Technology
Quantity:
10 000
8.2.13
An acknowledge sequence is enabled by setting the
acknowledge
(SSPCON2<4>). When this bit is set, the SCL pin is
pulled low and the contents of the acknowledge data
bit is presented on the SDA pin. If the user wishes to
generate an acknowledge, then the AKDT bit should be
cleared. If not, the user should set the AKDT bit before
starting an acknowledge sequence. The baud rate
generator then counts for one rollover period (T
and the SCL pin is de-asserted (pulled high). When the
SCL pin is sampled high (clock arbitration), the baud
FIGURE 8-29: ACKNOWLEDGE SEQUENCE WAVEFORM
1999 Microchip Technology Inc.
ACKNOWLEDGE SEQUENCE TIMING
SSPIF
sequence
Acknowledge sequence starts here,
SDA
SCL
Note: T
Set SSPIF at the end
of receive
BRG
= one baud rate generator period.
AKEN = 1, AKDT = 0
enable
Write to SSPCON2
8
D0
bit,
Advance Information
AKEN
BRG
),
Cleared in
software
T
BRG
ACK
rate generator counts for T
pulled low. Following this, the AKEN bit is automati-
cally cleared, the baud rate generator is turned off, and
the SSP module then goes into IDLE mode.
29)
8.2.13.13 WCOL STATUS FLAG
If the user writes the SSPBUF when an acknowledege
sequence is in progress, then WCOL is set and the
contents of the buffer are unchanged (the write doesn’t
occur).
T
BRG
9
Set SSPIF at the end
of acknowledge sequence
AKEN automatically cleared
Cleared in
software
PIC16C77X
BRG
. The SCL pin is then
DS30275A-page 85
(Figure 8-

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