PIC16LC774-I/PQ Microchip Technology, PIC16LC774-I/PQ Datasheet - Page 76

• Manufacturer Part Number: PIC16LC774-I/PQ
• Description: 44 PIN, 7KB OTP, 256 RAM, 33 I/O,
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16LC774-I/PQ

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: OTP
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-MQFP, 44-PQFP
• Processor Series: PIC16LC
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, SPI, SSP, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 3 bit
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC16C77X
8.2.10
A Repeated Start condition occurs when the RSEN bit
(SSPCON2<1>) is programmed high and the I
ule is in the idle state. When the RSEN bit is set, the
SCL pin is asserted low. When the SCL pin is sampled
low, the baud rate generator is loaded with the contents
of SSPADD<6:0>, and begins counting. The SDA pin
is released (brought high) for one baud rate generator
count (T
if SDA is sampled high, the SCL pin will be de-asserted
(brought high). When SCL is sampled high the baud
rate generator is re-loaded with the contents of
SSPADD<6:0> and begins counting.
must be sampled high for one T
followed by assertion of the SDA pin (SDA is low) for
one T
bit in the SSPCON2 register will be automatically
cleared, and the baud rate generator is not reloaded,
leaving the SDA pin held low. As soon as a start con-
dition is detected on the SDA and SCL pins, the S bit
(SSPSTAT<3>) will be set. The SSPIF bit will not be set
until the baud rate generator has timed-out.
FIGURE 8-22: REPEAT START CONDITION WAVEFORM
DS30275A-page 76
• SDA is sampled low when SCL goes from low to
• SCL goes low before SDA is asserted low. This
Note 1: If RSEN is programmed while any other
Note 2: A bus collision during the Repeated Start
high.
may indicate that another master is attempting
to transmit a data "1".
BRG
BRG
I
CONDITION TIMING
2
C MASTER MODE REPEATED START
while SCL is high. Following this, the RSEN
event is in progress, it will not take effect.
condition occurs if:
). When the baud rate generator times out,
Falling edge of ninth clock
SDA
SCL
End of Xmit
BRG
. This action is then
Write to SSPCON2
occurs here.
SDA = 1,
SCL(no change)
SDA and SCL
Advance Information
2
C mod-
T
SDA = 1,
SCL = 1
BRG
T
BRG
Immediately following the SSPIF bit getting set, the
user may write the SSPBUF with the 7-bit address in
7-bit mode, or the default first address in 10-bit mode.
After the first eight bits are transmitted and an ACK is
received, the user may then transmit an additional eight
bits of address (10-bit mode) or eight bits of data (7-bit
mode).
8.2.10.6
If the user writes the SSPBUF when a Repeated Start
sequence is in progress, then WCOL is set and the
contents of the buffer are unchanged (the write doesn’t
occur).
Note:
Sr = Repeated Start
T
BRG
At completion of start bit,
hardware clear RSEN bit
Set S (SSPSTAT<3>)
WCOL STATUS FLAG
Because queueing of events is not
allowed, writing of the lower 5 bits of
SSPCON2 is disabled until the Repeated
Start condition is complete.
and set SSPIF
Write to SSPBUF occurs here.
T
BRG
1st Bit
T
BRG
1999 Microchip Technology Inc.