PIC16F916T-I/SS Microchip Technology, PIC16F916T-I/SS Datasheet - Page 234

• Manufacturer Part Number: PIC16F916T-I/SS
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,28PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F916T-I/SS

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 352 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA160011 - DAUGHTER BOARD PICDEM LCD 16F91X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC16F913/914/916/917/946
FIGURE 16-8:
TABLE 16-6:
DS41250F-page 232
Name
INTCON
PIR1
PIR2
PIE1
PIE2
Legend:
Instruction Flow
Note 1:
GIE bit
(INTCON reg.)
INTF Flag
(INTCON reg.)
CLKOUT
INT pin
OSC1
Instruction
Executed
Instruction
Fetched
PC
2:
3:
4:
5:
x = unknown, u = unchanged, - = unimplemented locations read as ‘0’. Shaded cells are not used by the Interrupt
Module.
(3)
OSFIF
OSFIE
INTF flag is sampled here (every Q1).
Asynchronous interrupt latency = 3-4 T
Latency is the same whether Inst (PC) is a single cycle or a 2-cycle instruction.
CLKOUT is available only in INTOSC and RC Oscillator modes.
For minimum width of INT pulse, refer to AC specifications in Section 19.0 “Electrical Specifications”.
INTF is enabled to be set any time during the Q4-Q1 cycles.
EEIF
EEIE
Bit 7
GIE
SUMMARY OF INTERRUPT REGISTERS
Q1
Inst (PC - 1)
Inst (PC)
(1)
INT PIN INTERRUPT TIMING
Q2
PEIE
ADIF
ADIE
Bit 6
C2IF
C2IE
PC
Q3
(4)
Q4
(5)
RCIF
RCIE
C1IE
Bit 5
T0IE
C1IF
Q1
Inst (PC + 1)
Inst (PC)
Q2
LCDIF
LCDIE
(1)
INTE
Bit 4
TXIF
TXIE
PC + 1
CY
Q3
. Synchronous latency = 3 T
Q4
SSPIF
SSPIE
RBIE
Bit 3
—
—
Interrupt Latency
Q1
Dummy Cycle
CCP1IF
CCP1IE
Q2
LVDIF
LVDIE
Bit 2
PC + 1
T0IF
—
Q3
TMR2IF
TMR2IE
Q4
(2)
INTF
Bit 1
CY
—
—
, where T
Q1
Dummy Cycle
Inst (0004h)
TMR1IF
TMR1IE
CCP2IF
CCP2IE
Q2
0004h
RBIF
Bit 0
CY
Q3
© 2007 Microchip Technology Inc.
= instruction cycle time.
0000 000x
0000 0000
0000 -0-0
0000 0000
0000 -0-0
Q4
POR, BOR
Value on
Q1
Inst (0005h)
Q2
Inst (0004h)
0005h
other Resets
Value on all
0000 000x
0000 0000
0000 -0-0
0000 0000
0000 -0-0
Q3
Q4