PIC16F916-E/SO Microchip Technology, PIC16F916-E/SO Datasheet - Page 150
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC16F916-E/SO
Manufacturer Part Number
PIC16F916-E/SO
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SOP,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F913-ISS.pdf
(330 pages)
3.PIC16F913-ISS.pdf
(8 pages)
4.PIC16F913-ISS.pdf
(34 pages)
Specifications of PIC16F916-E/SO
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
352 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC (7.5mm Width)
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
352 B
Interface Type
SSP, I2C, AUSART, SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
24
Number Of Timers
2
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164120
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Data Rom Size
256 B
Height
2.31 mm
Length
17.87 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Width
7.49 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F913-ISS PDF datasheet #2
- PIC16F913-ISS PDF datasheet #3
- PIC16F913-ISS PDF datasheet #4
- Current page: 150 of 330
- Download datasheet (7Mb)
PIC16F913/914/916/917/946
10.2
The LCD driver module has 3 possible clock sources:
• F
• T1OSC/32
• LFINTOSC/32
The first clock source is the system clock divided by
8192 (F
provide about 1 kHz output when the system clock is
8 MHz. The divider is not programmable. Instead, the
LCD prescaler bits LP<3:0> of the LCDPS register are
used to set the LCD frame clock rate.
The second clock source is the T1OSC/32. This also
gives about 1 kHz when a 32.768 kHz crystal is used
with the Timer1 oscillator. To use the Timer1 oscillator
as a clock source, the T1OSCEN bit of the T1CON
register should be set.
The third clock source is the 31 kHz LFINTOSC/32,
which provides approximately 1 kHz output.
The second and third clock sources may be used to
continue running the LCD while the processor is in
Sleep.
Using bits CS<1:0> of the LCDCON register can select
any of these clock sources.
FIGURE 10-2:
DS41250F-page 148
OSC
Note 1:
V
V
V
DD
DD
DD
/8192
OSC
*
*
*
LCD Clock Source Selection
*
/8192). This divider ratio is chosen to
These values are provided for design guidance only and should be optimized for the application
by the designer.
Internal connection.
LCD Bias 3
10 kΩ*
10 kΩ*
LCD BIAS RESISTOR LADDER CONNECTION DIAGRAM
LCD Bias 2
10 kΩ*
LCD Bias 1
10 kΩ*
10 kΩ*
V
V
V
V
LCD
LCD
LCD
LCD
3
2
1
0
(1)
10.2.1
A 4-bit counter is available as a prescaler for the LCD
clock. The prescaler is not directly readable or writable;
its value is set by the LP<3:0> bits of the LCDPS register,
which determine the prescaler assignment and prescale
ratio.
The prescale values are selectable from 1:1 through
1:16.
10.3
The LCD driver module can be configured into one of
three bias types:
• Static Bias (2 voltage levels: V
• 1/2 Bias (3 voltage levels: V
• 1/3 Bias (4 voltage levels: V
This module uses an external resistor ladder to
generate the LCD bias voltages.
The external resistor ladder should be connected to the
VLCD1 pin (Bias 1), VLCD2 pin (Bias 2), VLCD3 pin
(Bias 3) and V
connected to V
Figure 10-2 shows the proper way to connect the
resistor ladder to the Bias pins..
and V
Note:
To
LCD
Driver
V
V
SS
SS
Connections for External R-ladder
DD
LCD Bias Types
)
V
V
V
V
Static Bias
LCD PRESCALER
VLCD pins used to supply LCD bias voltage
are enabled on power-up (POR) and must
be disabled by the user by clearing the
VLCDEN bit of the LCDCON register.
LCD
LCD
LCD
LCD
1/2 Bias
1/3 Bias
DD
SS
0
1
2
3
.
. The VLCD3 pin should also be
Static
Bias
V
V
© 2007 Microchip Technology Inc.
—
—
DD
SS
SS
SS
1/2 Bias
1/2 V
1/2 V
SS
, 1/2 V
, 1/3 V
V
V
DD
SS
and V
DD
DD
DD
DD
DD
, 2/3 V
and V
1/3 Bias
1/3 V
2/3 V
)
V
V
DD
SS
DD
DD
DD
DD
)
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