PIC16F883-E/ML Microchip Technology, PIC16F883-E/ML Datasheet - Page 214
PIC16F883-E/ML
Manufacturer Part Number
PIC16F883-E/ML
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.MCP1631RD-MCC2.pdf
(328 pages)
3.PIC16F882-ISS.pdf
(16 pages)
4.PIC16F882-ISS.pdf
(36 pages)
Specifications of PIC16F883-E/ML
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MCP1631RD-MCC2 - REFERENCE DESIGN MCP1631HV
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- MCP1631RD-MCC2 PDF datasheet #2
- PIC16F882-ISS PDF datasheet #3
- PIC16F882-ISS PDF datasheet #4
- Current page: 214 of 328
- Download datasheet (6Mb)
PIC16F882/883/884/886/887
14.2
The
between various kinds of Reset:
a)
b)
c)
d)
e)
f)
Some registers are not affected in any Reset condition;
their status is unknown on POR and unchanged in any
other Reset. Most other registers are reset to a “Reset
state” on:
• Power-on Reset
• MCLR Reset
• MCLR Reset during Sleep
• WDT Reset
• Brown-out Reset (BOR)
FIGURE 14-1:
DS41291F-page 212
MCLR/V
Power-on Reset (POR)
WDT Reset during normal operation
WDT Reset during Sleep
MCLR Reset during normal operation
MCLR Reset during Sleep
Brown-out Reset (BOR)
CLKI pin
OSC1/
V
Note 1:
DD
PIC16F882/883/884/886/887
Reset
PP
pin
LFINTOSC
OST/PWRT
Refer to the Configuration Word Register 1 (Register 14-1).
Brown-out
V
Module
Detect
DD
WDT
Reset
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
Rise
OST
PWRT
(1)
10-bit Ripple Counter
WDT
Time-out
Reset
11-bit Ripple Counter
SBOREN
BOREN
Power-on Reset
External
Reset
Sleep
differentiates
They are not affected by a WDT Wake-up since this is
viewed as the resumption of normal operation. TO and
PD bits are set or cleared differently in different Reset
situations, as indicated in Table 14-2. These bits are
used in software to determine the nature of the Reset.
See Table 14-5 for a full description of Reset states of
all registers.
A simplified block diagram of the On-Chip Reset Circuit
is shown in Figure 14-1.
The MCLR Reset path has a noise filter to detect and
ignore small pulses. See Section 17.0 “Electrical
Specifications” for pulse-width specifications.
Enable PWRT
Enable OST
© 2009 Microchip Technology Inc.
S
R
Q
Chip_Reset
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