PIC16F76-E/ML Microchip Technology, PIC16F76-E/ML Datasheet - Page 88
PIC16F76-E/ML
Manufacturer Part Number
PIC16F76-E/ML
Description
14 KB Flash, 368 RAM, 25 I/O 28 QFN 6x6mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F818-ISO.pdf
(6 pages)
4.PIC16F73-ISP.pdf
(174 pages)
5.PIC16F73-ISP.pdf
(14 pages)
6.PIC16F73-ISP.pdf
(12 pages)
Specifications of PIC16F76-E/ML
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F818-ISO PDF datasheet #3
- PIC16F73-ISP PDF datasheet #4
- PIC16F73-ISP PDF datasheet #5
- PIC16F73-ISP PDF datasheet #6
- Current page: 88 of 174
- Download datasheet (5Mb)
PIC16F7X
11.1
For the A/D converter to meet its specified accuracy,
the charge holding capacitor (C
to fully charge to the input channel voltage level. The
analog input model is shown in Figure 11-2. The source
impedance (R
impedance directly affect the time required to charge
the capacitor C
impedance varies over the device voltage (V
Figure 11-2. The source impedance affects the offset
voltage at the analog input (due to pin leakage current).
FIGURE 11-2:
TABLE 11-1:
DS30325B-page 86
Note 1: The RC source has a typical T
2: When the device frequencies are greater than 1 MHz, the RC A/D conversion clock source is only
3: For extended voltage devices (LC), please refer to the Electrical Specifications section.
A/D Acquisition Requirements
recommended for SLEEP operation.
Operation
S
RC
) and the internal sampling switch (R
32T
2T
8T
HOLD
(1, 2, 3)
T
OSC
OSC
OSC
Legend C
AD
VA
. The sampling switch (R
ANALOG INPUT MODEL
vs. MAXIMUM DEVICE OPERATING FREQUENCIES (STANDARD DEVICES (C))
R
V
I leakage
R
SS
C
S
T
PIN
IC
HOLD
AD Clock Source (T
ANx
C
5 pF
HOLD
PIN
= input capacitance
= threshold voltage
= leakage current at the pin due to
= interconnect resistance
= sampling switch
= sample/hold capacitance (from DAC)
various junctions
) must be allowed
AD
time of 4 µs but can vary between 2-6 µs.
V
DD
DD
), see
V
V
AD
T
T
SS
SS
= 0.6V
= 0.6V
ADCS1:ADCS0
)
)
)
00
01
10
11
I leakage
± 500 nA
The maximum recommended impedance for ana-
log sources is 10 kΩ. After the analog input channel is
selected (changed), the acquisition period must pass
before the conversion can be started.
To calculate the minimum acquisition time, T
the PICmicro™ Mid-Range MCU Family Reference
Manual (DS33023). In general, however, given a max-
imum source impedance of 10 kΩ and at a temperature
of 100°C, T
R
IC
≤ 1k
V
SS R
DD
Sampling
Switch
ACQ
6V
5V
4V
3V
2V
will be no more than 16 µsec.
SS
Sampling Switch
5 6 7 8 9 10 11
Maximum Device Frequency
V
2002 Microchip Technology Inc.
SS
C
= DAC Capacitance
= 51.2 pF
(k Ω )
HOLD
1.25 MHz
(Note 1)
20 MHz
5 MHz
Max.
ACQ
, see
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