PIC16F76-E/ML Microchip Technology, PIC16F76-E/ML Datasheet - Page 37
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PIC16F76-E/ML
Manufacturer Part Number
PIC16F76-E/ML
Description
14 KB Flash, 368 RAM, 25 I/O 28 QFN 6x6mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F818-ISO.pdf
(6 pages)
4.PIC16F73-ISP.pdf
(174 pages)
5.PIC16F73-ISP.pdf
(14 pages)
6.PIC16F73-ISP.pdf
(12 pages)
Specifications of PIC16F76-E/ML
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
4.3
PORTC is an 8-bit wide, bi-directional port. The corre-
sponding data direction register is TRISC. Setting a
TRISC bit (= ‘1’) will make the corresponding PORTC
pin an input (i.e., put the corresponding output driver in
a Hi-Impedance mode). Clearing a TRISC bit (= ‘0’) will
make the corresponding PORTC pin an output (i.e., put
the contents of the output latch on the selected pin).
PORTC is multiplexed with several peripheral functions
(Table 4-5). PORTC pins have Schmitt Trigger input
buffers.
When enabling peripheral functions, care should be
taken in defining TRIS bits for each PORTC pin. Some
peripherals override the TRIS bit to make a pin an
output, while other peripherals override the TRIS bit to
make a pin an input. Since the TRIS bit override is
in
read-modify-write instructions (BSF, BCF, XORWF)
with TRISC as destination should be avoided. The user
should refer to the corresponding peripheral section for
the correct TRIS bit settings, and to Section 13.1 for
additional information on read-modify-write operations.
TABLE 4-5:
TABLE 4-6:
2002 Microchip Technology Inc.
RC0/T1OSO/T1CKI
RC1/T1OSI/CCP2
RC2/CCP1
RC3/SCK/SCL
RC4/SDI/SDA
RC5/SDO
RC6/TX/CK
RC7/RX/DT
Legend: ST = Schmitt Trigger input
07h
87h
Legend: x = unknown, u = unchanged
Address
effect
Name
PORTC and the TRISC Register
PORTC
TRISC
Name
while
PORTC FUNCTIONS
SUMMARY OF REGISTERS ASSOCIATED WITH PORTC
PORTC Data Direction Register
the
Bit 7
RC7
Bit#
bit1
bit2
bit5
bit6
bit7
bit0
bit3
bit4
peripheral
Bit 6
RC6
Buffer Type
ST
ST
ST
ST
ST
ST
ST
ST
Bit 5
RC5
is
enabled,
Input/output port pin or Timer1 oscillator output/Timer1 clock input.
Input/output port pin or Timer1 oscillator input or Capture2
input/Compare2 output/PWM2 output.
Input/output port pin or Capture1 input/Compare1 output/PWM1 output.
modes.
Input/output port pin or Synchronous Serial Port data output.
Input/output port pin or USART Asynchronous Transmit or
Synchronous Clock.
Input/output port pin or USART Asynchronous Receive or
Synchronous Data.
RC3 can also be the synchronous serial clock for both SPI and I
RC4 can also be the SPI Data In (SPI mode) or Data I/O (I
Bit 4
RC4
Bit 3
RC3
FIGURE 4-5:
Port/Peripheral Select
Peripheral Data Out
Data Bus
WR Port
WR TRIS
RD TRIS
Peripheral
OE
RD Port
Peripheral Input
Note 1: I/O pins have diode protection to V
Bit 2
RC2
(3)
2: Port/Peripheral select signal selects between port data
3: Peripheral OE (output enable) is only activated if
and peripheral output.
peripheral select is active.
Bit 1
RC1
TRIS Latch
Data Latch
Function
D
D
CK
CK
(2)
Q
Q
Q
Q
Bit 0
RC0
PORTC BLOCK DIAGRAM
(PERIPHERAL OUTPUT
OVERRIDE)
0
1
xxxx xxxx uuuu uuuu
1111 1111 1111 1111
Value on:
PIC16F7X
Q
POR,
BOR
EN
D
DD
DS30325B-page 35
and V
Schmitt
Trigger
2
C mode).
Value on
RESETS
all other
V
SS
V
N
P
SS
DD
.
2
C
pin
I/O
(1)