PIC16F72-E/SP Microchip Technology, PIC16F72-E/SP Datasheet - Page 465
PIC16F72-E/SP
Manufacturer Part Number
PIC16F72-E/SP
Description
28 PIN, 3.5KB STD FLASH, 128 RAM, 22 I/O,
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F818-ISO.pdf
(6 pages)
4.PIC16F72-ISO.pdf
(136 pages)
5.PIC16F72-ISO.pdf
(6 pages)
Specifications of PIC16F72-E/SP
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
I2C, SPI, SSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
22
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000, DM163022
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 5 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F818-ISO PDF datasheet #3
- PIC16F72-ISO PDF datasheet #4
- PIC16F72-ISO PDF datasheet #5
- Current page: 465 of 688
- Download datasheet (3Mb)
25.3.2
1997 Microchip Technology Inc.
Multiplex Timing Generation
The timing generation circuitry will generate 1 to 4 common’s based on the display mode
selected. The mode is specified by bits LMUX1:LMUX0 (LCDCON<1:0>).
formulas for calculating the frame frequency.
Table 25-1: Frame Frequency Formulas
Table 25-2: Approximate Frame Frequency in Hz using Timer1 @ 32.768 kHz or
Table 25-3: Approximate Frame Frequency in Hz using internal RC osc @ 14 kHz
Multiplex Frame Frequency =
Static
LP3:LP0
LP3:LP0
1/2
1/3
1/4
2
3
4
5
6
7
0
1
2
3
Clock source / (128 * (LP3:LP0 + 1))
Clock source / (128 * (LP3:LP0 + 1))
Clock source / (96 * (LP3:LP0 + 1))
Clock source / (128 * (LP3:LP0 + 1))
Fosc @ 8 MHz
Static
Static
109
55
36
27
85
64
51
43
37
32
109
1/2
55
36
27
1/2
85
64
51
43
37
32
146
114
1/3
1/3
73
49
36
85
68
57
49
43
109
1/4
1/4
55
36
27
85
64
51
43
37
32
Section 25. LCD
Table 25-1
DS31025A-page 25-7
shows the
25
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