PIC16F72-E/SP Microchip Technology, PIC16F72-E/SP Datasheet - Page 345
PIC16F72-E/SP
Manufacturer Part Number
PIC16F72-E/SP
Description
28 PIN, 3.5KB STD FLASH, 128 RAM, 22 I/O,
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F818-ISO.pdf
(6 pages)
4.PIC16F72-ISO.pdf
(136 pages)
5.PIC16F72-ISO.pdf
(6 pages)
Specifications of PIC16F72-E/SP
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
I2C, SPI, SSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
22
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000, DM163022
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 5 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F818-ISO PDF datasheet #3
- PIC16F72-ISO PDF datasheet #4
- PIC16F72-ISO PDF datasheet #5
- Current page: 345 of 688
- Download datasheet (3Mb)
Figure 18-1:
Figure 18-2:
1997 Microchip Technology Inc.
Write to TXREG
TXIF bit
(Transmit buffer
reg. empty flag)
TRMT bit
(Transmit shift
reg. empty flag)
BRG output
(shift clock)
TX/CK pin
USART Transmit Block Diagram
Asynchronous Master Transmission
Steps to follow when setting up a Asynchronous Transmission:
1.
2.
3.
4.
5.
6.
7.
WORD 1
Transmit Shift Reg
TXIE
Initialize the SPBRG register for the appropriate baud rate. If a high speed baud rate is
desired, set the BRGH bit. (Subsection
Enable the asynchronous serial port by clearing the SYNC bit and setting the SPEN bit.
If interrupts are desired, then set the TXIE, GIE and PEIE bits.
If 9-bit transmission is desired, then set the TX9 bit.
Enable the transmission by setting the TXEN bit, which will also set the TXIF bit.
If 9-bit transmission is selected, the ninth bit should be loaded in the TX9D bit.
Load data to the TXREG register (starts transmission).
Word 1
Interrupt
TXEN
TXIF
Baud Rate Generator
Start Bit
SPBRG
Baud Rate CLK
Bit 0
MSb
(8)
TX9D
Bit 1
TSR register
WORD 1
TX9
TXREG register
18.3 “USART Baud Rate Generator (BRG)”
Section 18. USART
8
Data Bus
8
LSb
0
Bit 7/8
TRMT
Stop Bit
Pin Buffer
and Control
DS31018A-page 18-9
SPEN
TX/CK pin
)
18
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