MCP3002-I/MS Microchip Technology, MCP3002-I/MS Datasheet - Page 19
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
MCP3002-I/MS
Manufacturer Part Number
MCP3002-I/MS
Description
IC,Data Acquisition System,2-CHANNEL,10-BIT,TSSOP,8PIN,PLASTIC
Manufacturer
Microchip Technology
Datasheet
1.MCP3002-IMS.pdf
(34 pages)
Specifications of MCP3002-I/MS
Number Of Bits
10
Sampling Rate (per Second)
200k
Data Interface
Serial, SPI™
Number Of Converters
1
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCP3002-I/MS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
6.0
6.1
With most microcontroller SPI ports, it is required to send
groups of eight bits. It is also required that the
microcontroller SPI port be configured to clock out data
on the falling edge of clock and latch data in on the rising
edge. Depending on how communication routines are
used, it is very possible that the number of clocks
required for communication will not be a multiple of
eight. Therefore, it may be necessary for the MCU to
send more clocks than are actually required. This is
usually done by sending ‘leading zeros’ before the start
bit, which are ignored by the device. As an example,
Figure 6-1
be interfaced to a MCU with a hardware SPI port.
Figure 6-1
which requires that the SCLK from the MCU idles in the
‘low’ state, while
SPI Mode 1,1 where the clock idles in the ‘high’ state.
FIGURE 6-1:
low).
© 2008 Microchip Technology Inc.
X = Don’t Care Bits
MCU Received Data
MCU Transmitted Data
(Aligned with rising
(Aligned with falling
edge of clock)
edge of clock)
APPLICATIONS INFORMATION
Using the MCP3002 with
Microcontroller (MCU) SPI Ports
depicts the operation shown in SPI Mode 0,0,
and
SCLK
D
Figure 6-2
OUT
D
CS
IN
Figure 6-2
SPI Communication with the MCP3002 using 8-bit segments (Mode 0,0: SCLK idles
1
show how the MCP3002 can
X
Data stored into MCU receive register
X
shows the similar case of
2
after transmission of first 8 bits
X
Start
Bit
1
3
X
SGL/
DIFF
4
X
ODD/
SIGN
5
X
NULL
MS
BF
BIT
(Null)
6
0
B9
X
7
B9
B8
X
8
B8
X
B7
9
B7
Data stored into MCU receive register
X
B6
after transmission of second 8 bits
10
As shown in
A/D Converter contains one leading zero before the
start bit. Arranging the leading zero this way produces
the output 10 bits to fall in positions easily manipulated
by the MCU. When the first 8 bits are transmitted to the
device, the MSB data bit is clocked out of the A/D
Converter on the falling edge of clock number 6. After
the second eight clocks have been sent to the device,
the receive register will contain the lowest-order eight
bits of the conversion results. Easier manipulation of the
converted data can be obtained by using this method.
B6
Don’t Care
B5
X
11
B5
X
X
B4
12
B4
X
B3
13
B3
Figure
X
B2
14
B2
X
B1
15
B1
6-1, the first byte transmitted to the
X
B0
16
B0
Data is clocked out of
A/D Converter on falling edges
X
MCU latches data from A/D Converter
on rising edges of SCLK
MCP3002
DS21294D-page 19