MCP3002-I/MS Microchip Technology, MCP3002-I/MS Datasheet - Page 17

• Manufacturer Part Number: MCP3002-I/MS
• Description: IC,Data Acquisition System,2-CHANNEL,10-BIT,TSSOP,8PIN,PLASTIC
• Manufacturer: Microchip Technology

Specifications of MCP3002-I/MS

• Number Of Bits: 10
• Sampling Rate (per Second): 200k
• Data Interface: Serial, SPI™
• Number Of Converters: 1
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

5.0
5.1
Communication with the MCP3002 is done using a
standard SPI-compatible serial interface. Initiating
communication with the device is done by bringing the
CS line low. See
up with the CS pin low, it must be brought high and
back low to initiate communication. The first clock
received with CS low and D
bit. The SGL/DIFF bit and the ODD/SIGN bit follow the
start bit and are used to select the input channel
configuration. The SGL/DIFF is used to select single
ended or psuedo-differential mode. The ODD/SIGN bit
selects which channel is used in single ended mode,
and is used to determine polarity in psuedo-differential
mode. Following the ODD/SIGN bit, the MSBF bit is
transmitted to and is used to enable the LSB first format
for the device. If the MSBF bit is high, then the data will
come from the device in MSB first format and any
further clocks with CS low, will cause the device to out-
put zeros. If the MSBF bit is low, then the device will
output the converted word LSB first after the word has
been transmitted in the MSB first format.
shows the configuration bits for the MCP3002. The
device will begin to sample the analog input on the
second rising edge of the clock, after the start bit has
been received. The sample period will end on the
falling edge of the third clock following the start bit.
On the falling edge of the clock for the MSBF bit, the
device will output a low null bit. The next sequential 10
clocks will output the result of the conversion with MSB
first as shown in
the device on the falling edge of the clock. If all 10 data
bits have been transmitted and the device continues to
receive clocks while the CS is held low (and the MSBF
bit is high), the device will output the conversion result
LSB first as shown in
provided to the device while CS is still low (after the
LSB first data has been transmitted), the device will
clock out zeros indefinitely.
© 2008 Microchip Technology Inc.
SERIAL COMMUNICATIONS
Overview
Figure
Figure
5-1. Data is always output from
Figure
5-1. If the device was powered
IN
high will constitute a start
5-2. If more clocks are
Table 5-1
If necessary, it is possible to bring CS low and clock in
leading zeros on the D
often done when dealing with microcontroller-based
SPI ports that must send 8 bits at a time. Refer to
Section 6.1 “Using the MCP3002 with Microcon-
troller (MCU) SPI Ports” for more details on using the
MCP3002 devices with hardware SPI ports.
If it is desired, the CS can be raised to end the
conversion period at any time during the transmission.
Faster conversion rates can be obtained by using this
technique if not all the bits are captured before starting
a new cycle. Some system designers use this method
by capturing only the highest-order 8 bits and ‘throwing
away’ the lower 2 bits.
TABLE 5-1:
Single-Ended
Mode
Pseudo-
Differential
Mode
THE MCP3002
CONFIG BITS
SGL/
DIFF
CONFIGURING BITS FOR
1
1
0
0
IN
line before the start bit. This is
ODD/
SIGN
0
1
0
1
MCP3002
SELECTION
IN+
IN-
CHANNEL
+
0
DS21294D-page 17
IN+
IN-
+
1
GND
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—
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