IAM-91563-TR1 Avago Technologies US Inc., IAM-91563-TR1 Datasheet - Page 10

• Manufacturer Part Number: IAM-91563-TR1
• Description: IC,Downconverter,GAAS,TSSOP,6PIN,PLASTIC
• Manufacturer: Avago Technologies US Inc.

Specifications of IAM-91563-TR1

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Figure 26. Available Conversion Gain and SSB Noise Figure
vs. Device Current (Source Resistor).
Figure 27. One dB Compression and Input Third Order Inter-
cept Point vs. Device Current (Resistor).
As an example of improved linearity, the use of a 15 Ω
resistor at the Source Bypass pin increases the device
current to 14 mA. At 1.9 GHz, the input IP
from -6.5 dBm to -3 dBm. Increasing the LO drive level
from -5 dBm to -1 dBm further increases the input IP
to 0 dBm.
Application Example
The printed circuit layout in Figure 28 is a general
purpose layout that will accommodate components for
using the IAM-91563 for RF inputs from 800 MHz to 6
GHz. This layout is a microstripline design (solid
groundplane on the backside of the circuit board) with
50 Ω interfaces for the RF input, IF output, and LO
input. The circuit is fabricated on 0.031-inch thick FR-
4 dielectric material. Plated through holes (vias) are
used to bring the ground to the top side of the circuit
where needed. Multiple vias are used to reduce the
inductance of the paths to ground.
-10
14
12
10
-2
-4
-6
-8
8
6
4
0
7
1000
7
1000
Approximate Resistor Value (Ω)
9
Approximate Resistor Value (Ω)
9
56
DEVICE CURRENT (mA)
56
DEVICE CURRENT (mA)
11
11
21
21
13
13
9
9
15
15
GAIN
NF
P
5
1 dB
IP
5
3
17
17
3
3
19
3
19
is increased
3
Figure 28. PCB Layout.
1.9 GHz Design Example
To illustrate a design approach for using the IAM-91563,
a PCS band downconverter with an RF of 1.9 GHz and
IF of 110 MHz is presented. The PCB layout above was
used to assemble the mixer and verify performance.
A schematic diagram of the 1.9 GHz circuit is shown in
Figure 29.
Figure 29. Schematic of Example Application Circuit.
At the RF input port, series capacitor C1 and transmis-
sion line MLIN form the input matching network and
high pass filter. (Note: The PCB layout above has
provision for an inductor, L1, in series with MLIN.
Inductor L1 is not used in this design.)
Referring to the table of Reflection Coefficients, the RF
input port Γ
plotted as Point A on the Smith chart in Figure 30. For
reasons previously discussed in the “RF Port” section
above, a series C - shunt L network (from the 50 Ω
source to Γ
Addition of a 6.5 nH shunt inductance moves the im-
pedance trajectory from Point A to Point B. The match
to 50 Ω is completed with a 0.6 pF series capacitance,
C1, that moves the match to Point C, the center of the
Smith chart.
Input
RF
RF
IAM-91
RF
RF
L1 = 0
MLIN
) will be used to match Γ
C1
= 0.82 ∠−37° at 1.9 GHz. This point is
LO
C3
91
10
Input
C7
L3
LO
L2
C2
C5
RFC
C4
C6
Output
+V
V
IF
IF
RF
d
to 50 Ω.