DSPIC30F4013-20E/ML Microchip Technology, DSPIC30F4013-20E/ML Datasheet - Page 15
![IC,DSP,16-BIT,CMOS,LLCC,44PIN,PLASTIC](/photos/6/81/68122/150-44-qfn_sml.jpg)
DSPIC30F4013-20E/ML
Manufacturer Part Number
DSPIC30F4013-20E/ML
Description
IC,DSP,16-BIT,CMOS,LLCC,44PIN,PLASTIC
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F3014-30IPT.pdf
(228 pages)
3.DSPIC30F3014-30IPT.pdf
(16 pages)
4.DSPIC30F3014-30IPT.pdf
(6 pages)
5.DSPIC30F3014-30IPT.pdf
(14 pages)
6.DSPIC30F3014-30IPT.pdf
(20 pages)
Specifications of DSPIC30F4013-20E/ML
Rohs Compliant
YES
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, I²S, POR, PWM, WDT
Number Of I /o
30
Program Memory Size
48KB (16K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 13x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
DSPIC30F401320EML
TABLE 5-7:
© 2010 Microchip Technology Inc.
SSS<2:0>
SWRP
GSS<1:0>
GCP
GWRP
BKBUG
COE
ICS<1:0>
RESERVED
Bit Field
—
FSS
FSS
FGS
FGS
FGS
FICD
FICD
FICD
FBS, FSS, FGS Reserved (read as ‘1’, write as ‘1’)
All
CONFIGURATION BITS DESCRIPTION (CONTINUED)
Register
Secure Segment Program Memory Code Protection (only present in
dsPIC30F5011/5013/6010A/6011A/6012A/6013A/6014A/6015)
111 = No Secure Segment
110 = Standard security; Small-sized Secure Program Flash
101 = Standard security; Medium-sized Secure Program Flash
100 = Standard security; Large-sized Secure Program Flash
011 = No Secure Segment
010 = High security; Small-sized Secure Program Flash
001 = High security; Medium-sized Secure Program Flash
000 = High security; Large-sized Secure Program Flash
Secure Segment Program Memory Write Protection (only present in
dsPIC30F5011/5013/6010A/6011A/6012A/6013A/6014A/6015)
1 = Secure Segment program memory is not write-protected
0 = Secure program memory is write-protected
General Segment Program Memory Code Protection (only present in
dsPIC30F5011/5013/6010A/6011A/6012A/6013A/6014A/6015)
11 = Code protection is disabled
10 = Standard security code protection is enabled
0x = High security code protection is enabled
General Segment Program Memory Code Protection (present in all devices
except dsPIC30F5011/5013/6010A/6011A/6012A/6013A/6014A/6015)
1 = General Segment program memory is not code-protected
0 = General Segment program memory is code-protected
General Segment Program Memory Write Protection
1 = General Segment program memory is not write-protected
0 = General Segment program memory is write-protected
Debugger/Emulator Enable
1 = Device will reset into Operational mode
0 = Device will reset into Debug/Emulation mode
Debugger/Emulator Enable
1 = Device will reset into Operational mode
0 = Device will reset into Clip-on Emulation mode
ICD Communication Channel Select
11 = Communicate on PGC/EMUC and PGD/EMUD
10 = Communicate on EMUC1 and EMUD1
01 = Communicate on EMUC2 and EMUD2
00 = Communicate on EMUC3 and EMUD3
Unimplemented (read as ‘0’, write as ‘0’)
[Secure Segment starts after BS and ends at 0x001FFF]
[Secure Segment starts after BS and ends at 0x003FFF]
[Secure Segment starts after BS and ends at 0x007FFF]
[Secure Segment starts after BS and ends at 0x001FFF]
[Secure Segment starts after BS and ends at 0x003FFF]
[Secure Segment starts after BS and ends at 0x007FFF]
Description
DS70102K-page 15