DSPIC30F3013T-20E/SO Microchip Technology, DSPIC30F3013T-20E/SO Datasheet - Page 63
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DSPIC30F3013T-20E/SO
Manufacturer Part Number
DSPIC30F3013T-20E/SO
Description
IC,DSP,16-BIT,CMOS,SOP,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F2011-20ISO.pdf
(210 pages)
3.DSPIC30F2011-20ISO.pdf
(6 pages)
4.DSPIC30F2011-20IP.pdf
(26 pages)
5.DSPIC30F3012-20ISO.pdf
(14 pages)
6.DSPIC30F3012-20ISO.pdf
(20 pages)
Specifications of DSPIC30F3013T-20E/SO
Rohs Compliant
YES
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
20
Program Memory Size
24KB (8K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
APPENDIX C:
Revision K (November 2010)
This version of the document includes the following
updates:
• Added Note three to
• Updated the first paragraph of
• Updated
• Removed the VARIANT bit and updated the bit
• Removed the VARIANT bit and updated the bit
• Updated Note 3 in
• Updated Step 11 in
• Updated Steps 5, 12 and 19 in
• Updated Steps 5, 6 and 8 in
• Updated Steps 6 and 8 in
• Updated Steps 6 and 8 in
• Updated Entering ICSP™ Mode (see
• Updated Steps 4 and 11 in
• Renamed parameters: P12 to P12a and P13 to
© 2010 Microchip Technology Inc.
Note:
Enhanced ICSP Mode”
“Device ID”
definition for the DEVID register in
dsPIC30F Device ID Registers
field definition and description for the DEVID
register in
Mode”
Execution for BUlk Erasing Program Memory
(Only in Normal-voltage Systems)
Instruction Execution for Erasing Program
Memory (Either in Low-voltage or Normal-voltage
Systems)
Instruction Execution for Writing Configuration
Registers
Instruction Execution for Writing Code Memory
Instruction Execution for Writing Data EEPROM
Programming the Programming Executive
P13a, and added parameters P12b and P13b in
Table
13-1:
Table
Revision histories were not recorded for
revisions A through H. The previous
revision (J), was published in August
2007.
Table
AC/DC Characteristics
10-1: Device IDs
10-3:
Section 11.3 “Entering ICSP
Table
REVISION HISTORY
Section 5.2 “Entering
Device ID Bits Description
11-4:
Table
Table
Table
Table
Section 10.0
Table
Serial Instruction
11-8:
11-9:
12-1:
11-7:
Table
11-5:
Serial
Serial
Figure
Serial
10-2:
Serial
11-4)
DS70102K-page 63