DSPIC30F2023T-30I/PT Microchip Technology, DSPIC30F2023T-30I/PT Datasheet - Page 208
DSPIC30F2023T-30I/PT
Manufacturer Part Number
DSPIC30F2023T-30I/PT
Description
12KB, Flash, 512bytes-RAM, 30MIPS, 35I/O, 16-bit Family,nanoWatt 44 TQFP 10x10x1
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.AC164335.pdf
(286 pages)
2.DM300023.pdf
(22 pages)
3.DM300023.pdf
(18 pages)
4.DSPIC30F2011-20ISO.pdf
(66 pages)
5.DSPIC30F2011-20IP.pdf
(26 pages)
6.DSPIC30F1010-30ISO.pdf
(26 pages)
7.DSPIC30F1010-30ISO.pdf
(50 pages)
Specifications of DSPIC30F2023T-30I/PT
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
12KB (4K x 24)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F2023T-30I/PTTR
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- AC164335 PDF datasheet
- DM300023 PDF datasheet #2
- DM300023 PDF datasheet #3
- DSPIC30F2011-20ISO PDF datasheet #4
- DSPIC30F2011-20IP PDF datasheet #5
- DSPIC30F1010-30ISO PDF datasheet #6
- DSPIC30F1010-30ISO PDF datasheet #7
- Current page: 208 of 286
- Download datasheet (5Mb)
dsPIC30F1010/202X
18.3.1
While coming out of a Power-on Reset, the device
selects its clock source based on:
a)
b)
c)
The selection is as shown in Table 18-1.
TABLE 18-1:
18.3.2
In order to ensure that a crystal oscillator (or ceramic
resonator) has started and stabilized, an Oscillator
Start-up Timer is included. It is a simple 10-bit counter
that counts 1024 T
oscillator clock to the rest of the system. The time-out
period is designated as T
every time the oscillator has to restart (i.e., on POR and
wake-up from Sleep). The Oscillator Start-up Timer is
applied to the HS Oscillator mode (upon
wake-up from Sleep and POR) for the primary
oscillator.
18.3.3
The PLL multiplies the clock, which is generated by the
primary oscillator. The PLL is selectable to have a gain
of x32 only. Input and output frequency ranges are
summarized in Table 18-2.
DS70178C-page 206
HS w/PLL 32x
FRC w/PLL 32x
FRC w/PLL 32x
EC w/PLL 32x
EC w/PLL 32x
EC
EC
HS
FRC
FRC
Note 1:
(2)
(2)
(2)
FNOSC<1:0> Configuration bits that select one
of three oscillator groups (HS, EC or FRC)
POSCMD1<1:0> Configuration bits that select
the Primary Oscillator Mode
OSCIOFNC selects if the OSC2 pin is an I/O or
clock output
(2)
(2)
2:
Oscillator
Mode
CLKO is not recommended to drive external circuits.
This mode is not recommended for some applications; disabling 32x PLL will not allow operation of
high-speed ADC and PWM.
INITIAL CLOCK SOURCE
SELECTION
OSCILLATOR START-UP TIMER
(OST)
PHASE LOCKED LOOP (PLL)
CONFIGURATION BIT VALUES FOR CLOCK SELECTION
OSC
OST
cycles before releasing the
. The T
Internal RC
Internal RC
Oscillator
External
External
External
Source
PLL
PLL
PLL
PLL
PLL
OST
time is involved
FNOSC<1:0>
Bit 1
1
0
0
1
1
1
1
1
0
0
Preliminary
Bit 0
1
1
1
1
1
0
0
0
0
0
POSCMD<1:0>
Bit 1
1
1
1
0
0
0
0
1
1
1
TABLE 18-2:
The PLL features a lock output, which is asserted when
the PLL enters a phase locked state. Should the loop
fall out of lock (e.g., due to noise), the lock signal will be
rescinded. The state of this signal is reflected in the
read-only LOCK bit in the OSCCON register.
6.4 MHz
9.7 MHz
14.55 MHz
Bit 0
F
0
1
1
0
0
0
0
0
1
1
IN
OSCIOFNC
PLL FREQUENCY RANGE
N/A
N/A
1
0
1
0
1
0
0
1
Multiplier
© 2006 Microchip Technology Inc.
PLL
x32
x32
x32
Function
CLKO
CLKO
OSC2
CLKO
CLKO
CLKO
CLKO
I/O
I/O
I/O
I/O
(1)
(1)
205 MHz
310 MHz
466 MHz
F
OUT
Function
OSC1
CLKI
CLKI
CLKI
CLKI
CLKI
CLKI
I/O
I/O
I/O
I/O
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