DSPIC30F2020-20E/MM Microchip Technology, DSPIC30F2020-20E/MM Datasheet - Page 7

12KB, Flash, 512bytes-RAM, 30MIPS, 21I/O, 16-bit Family,nanoWatt 28 QFN-S 6x6mm

DSPIC30F2020-20E/MM

Manufacturer Part Number
DSPIC30F2020-20E/MM
Description
12KB, Flash, 512bytes-RAM, 30MIPS, 21I/O, 16-bit Family,nanoWatt 28 QFN-S 6x6mm
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F2020-20E/MM

Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
12KB (4K x 24)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-QFN
Package
28QFN-S EP
Device Core
dsPIC
Family Name
dsPIC30
Maximum Speed
20 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Number Of Programmable I/os
21
Interface Type
I2C/SPI/UART
On-chip Adc
8-chx10-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM300023 - KIT DEMO DSPICDEM SMPS BUCKAC164322 - MODULE SOCKET MPLAB PM3 28/44QFNDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
7. Module: PWM
EQUATION 1:
© 2010 Microchip Technology Inc.
The
(DS70178) states the priority of PWMx pin
ownership as:
• PWM Generator (lowest priority)
• Output Override
• Current-Limit Override
• Fault Override
• PENx (GPIO/PWM) Ownership (highest
Instead of following the above priority scheme, the
PWMx pin ownership is determined by ANDing the
Output Override Data bits (OVRDAT<1:0>),
Current-Limit Override Data bits (CLDAT<1:0>)
and Fault Override Data bits (FLTDAT<1:0>) in the
IOCONx register.
For example, the override data may be set as
follows:
• OVRDAT<1:0> = 00
• CLDAT<1:0> = 01
• FLTDAT<1:0> = 10
priority)
“dsPIC30F1010/202X
PWMxH = (OVRDAT<1>) AND (CLDAT<1>) AND (FLTDAT<1>) = 0 AND 0 AND 1 = 0
PWMxL = (OVRDAT<0>) AND (CLDAT<0>) AND (FLTDAT<0>) = 0 AND 1 AND 0 = 0
Data
Sheet”
dsPIC30F1010/202X
If all three overrides occur simultaneously, the
following operations shown in Equation 1 will
determine the state of the PWMx pin.
Therefore,
simultaneously, only the override data for the
active override sources will be ANDed together,
while the inactive override sources will be ignored.
If only one override is active, override priorities do
not apply and operation of the PWM overrides is
normal.
Work around
None.
Affected Silicon Revisions
A1
X
A2
X
when
A3
X
multiple
overrides
DS80445D-page 7
occur

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