DS90CF386MTD National Semiconductor, DS90CF386MTD Datasheet - Page 10

• Manufacturer Part Number: DS90CF386MTD
• Description: Line Receiver IC
• Manufacturer: National Semiconductor

Specifications of DS90CF386MTD

• Peak Reflow Compatible (260 C): No
• Supply Voltage Max: 3.30V
• Leaded Process Compatible: No
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

AC Timing Diagrams
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C — Setup and Hold Time (Internal data sampling window) defined by Rspos (receiver input strobe position) min and max
Tppos — Transmitter output pulse position (min and max)
RSKM = Cable Skew (type, length) + Source Clock Jitter (cycle to cycle) (Note 9) + ISI (Inter-symbol interference) (Note 10)
Cable Skew — typically 10 ps–40 ps per foot, media dependent
Note 9: Cycle-to-cycle jitter is less than 250 ps at 85 MHz.
Note 10: ISI is dependent on interconnect length; may be zero.
FIGURE 13. Receiver LVDS Input Skew Margin
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