DS90CF386MTD National Semiconductor, DS90CF386MTD Datasheet
DS90CF386MTD
Manufacturer Part Number
DS90CF386MTD
Description
Line Receiver IC
Manufacturer
National Semiconductor
Specifications of DS90CF386MTD
Peak Reflow Compatible (260 C)
No
Supply Voltage Max
3.30V
Leaded Process Compatible
No
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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© 1999 National Semiconductor Corporation
DS90CF386/DS90CF366
+3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD)
Link— 85 MHz, +3.3V LVDS Receiver 18-Bit Flat Panel
Display (FPD) Link— 85 MHz
General Description
The DS90CF386 receiver converts the four LVDS data
streams (Up to 2.38 Gbps throughput or 297.5 Megabytes/
sec bandwidth) back into parallel 28 bits of CMOS/TTL data
(24 bits of RGB and 4 bits of Hsync, Vsync, DE and CNTL).
Also available is the DS90CF366 that converts the three
LVDS data streams (Up to 1.78 Gbps throughput or 223
Megabytes/sec bandwidth) back into parallel 21 bits of
CMOS/TTL data (18 bits of RGB and 3 bits of Hsync, Vsync
and DE). Both Receivers’ outputs are Falling edge strobe. A
Rising edge or Falling edge strobe transmitter (DS90C385/
DS90C365) will interoperate with a Falling edge strobe Re-
ceiver without any translation logic.
This chipset is an ideal means to solve EMI and cable size
problems associated with wide, high speed TTL interfaces.
Block Diagrams
TRI-STATE
®
is a registered trademark of National Semiconductor Corporation.
See NS Package Number MTD56
Order Number DS90CF386MTD
DS90CF386
DS101085
DS101085-27
Features
n 20 to 85 MHz shift clock support
n Rx power consumption
n Rx Power-down mode
n ESD rating
n Supports VGA, SVGA, XGA and Single Pixel SXGA.
n PLL requires no external components
n Compatible with TIA/EIA-644 LVDS standard
n Low profile 56-lead or 48-lead TSSOP package
Grayscale
See NS Package Number MTD48
Order Number DS90CF366MTD
>
7 kV (HBM),
DS90CF366
<
<
1.44 mW (max)
142 mW (typ)
>
700V (EIAJ)
@
November 1999
85MHz
www.national.com
DS101085-28
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