CS5507-AP Cirrus Logic Inc, CS5507-AP Datasheet - Page 7

• Manufacturer Part Number: CS5507-AP
• Description: A/D Converter (A-D) IC
• Manufacturer: Cirrus Logic Inc

Specifications of CS5507-AP

• Sample Rate: 100SPS
• Input Channels Per Adc: 1
• Mounting Type: Through Hole
• No. Of Channels: 1
• Power Rating: 3.2mW
• Supply Voltage Min: 4.5V
• Peak Reflow Compatible (260 C): No
• Rohs Compliant: No
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

3.3V SWITCHING CHARACTERISTICS
VD+ = 3.3V ± 5%; VA- = -5V ± 10%; Input Levels: Logic 0 = 0V, Logic 1 = VD+; CL = 50 pF.) (Note 2)
DS59F4
DS59F5
Master Clock Frequency:
Master Clock Duty Cycle
Rise Times:
Fall Times:
Start-Up
Power-On Reset Period
Oscillator Start-up Time
Wake-up Period
Calibration
CONV Pulse Width (CAL = 1)
CONV and CAL High to Start of Calibration
Start of Calibration to End of Calibration
Conversion
Set Up Time
Hold Time
CONV Pulse Width
CONV High to Start of Conversion
Set Up Time
Hold Time
Start of Conversion to End of Conversion
Parameter
BP/UP stable prior to DRDY falling
BP/UP stable after DRDY falls
Internal Oscillator:
External Clock:
Any Digital Input
Any Digital Output
Any Digital Input
Any Digital Output
XTAL=32.768 kHz
A0, A1 to CONV High
A0, A1 after CONV High
(Note 10)
(Note 10)
(Note 11)
(Note 12)
(Note 13)
(Note 14)
(Note 15)
-A,B
(T
-S
A
= T
Symbol
t
t
t
t
t
t
t
t
t
t
t
XIN
t
t
MIN
f
t
wup
t
cpw
ccw
buh
rise
osu
sac
hca
scn
bus
con
res
or
fall
cal
clk
scl
to T
MAX
82/f
30.0
30.0
Min
100
100
100
30
40
50
0
-
-
-
-
-
-
-
-
-
-
-
clk
VA+ = 5V ± 10%;
1800/f
3246/f
1624/f
32.768
32.768
Typ
500
50
20
10
-
-
-
-
-
-
-
-
-
-
-
-
clk
clk
clk
CS5505/6/7/8
CS5505/6/7/8
2/f
2/f
clk+
clk
Max
53.0
34.0
163
1.0
1.0
60
-
-
-
-
-
-
-
-
-
-
-
-
-
+200
200
Units
kHz
kHz
kHz
ms
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
%
s
s
s
s
7
7