CDB4384 Cirrus Logic Inc, CDB4384 Datasheet - Page 44

no-image

CDB4384

Manufacturer Part Number
CDB4384
Description
Eval Bd 8Chn DAC W/DSD Supt&Low-Latnc DF
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of CDB4384

Number Of Dac's
8
Number Of Bits
24
Outputs And Type
8, Single Ended
Sampling Rate (per Second)
192k
Data Interface
Serial
Dac Type
Voltage
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
CS4384
Description/function
Audio D/A
Operating Supply Voltage
5 V
Product
Audio Modules
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
CS4384
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant, Contains lead / RoHS non-compliant
Other names
598-1525
44
6.11
6.11.1 Digital Volume Control (xx_VOL7:0)
6.12
6.12.1 Master Clock Divide by 2 Enable (MCLKDIV)
Reserved
xx_VOL7
7
0
7
0
Volume Control (Address 0Bh, 0Ch, 0Eh, 0Fh, 11h, 12h, 14h, 15h)
PCM Clock Mode (Address 16h)
Default = 00h (0 dB)
Function:
The Digital Volume Control registers allow independent control of the signal levels in 1/2 dB increments
from 0 to -127.5 dB. Volume settings are decoded as shown in
mented as dictated by the Soft and Zero Cross bits in the Power and Muting Control register. Note that
the values in the volume setting column in
by taking the decimal value of the volume register and multiplying by 6.02/12.
Function:
When set to 1, the MCLKDIV bit enables a circuit which divides the externally applied MCLK signal by 2
prior to all other internal circuitry.
When set to 0 (default), MCLK is unchanged.
These eight registers provide individual volume and mute control for each of the eight channels.
The values for “xx” in the bit fields above are as follows:
Register address 0Bh - xx = A1
Register address 0Ch - xx = B1
Register address 0Eh - xx = A2
Register address 0Fh - xx = B2
Register address 11h - xx = A3
Register address 12h - xx = B3
Register address 14h - xx = A4
Register address 15h - xx = B4
Reserved
xx_VOL6
6
0
6
0
MCLKDIV
xx_VOL5
Binary Code
00000000
00000001
00000110
5
0
11111111
5
0
Table 10. Example Digital Volume Settings
Reserved
xx_VOL4
4
0
4
0
Table 10
Decimal Value
Reserved
xx_VOL3
255
are approximate. The actual attenuation is determined
0
1
6
3
0
3
0
Table
Reserved
xx_VOL2
Volume Setting
2
0
2
0
10. The volume changes are imple-
-127.5 dB
-0.5 dB
-3.0 dB
0 dB
Reserved
xx_VOL1
1
0
1
0
CS4384
Reserved
xx_VOL0
DS620F1
0
0
0
0

Related parts for CDB4384