CDB4384 Cirrus Logic Inc, CDB4384 Datasheet - Page 33
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CDB4384
Manufacturer Part Number
CDB4384
Description
Eval Bd 8Chn DAC W/DSD Supt&Low-Latnc DF
Manufacturer
Cirrus Logic Inc
Specifications of CDB4384
Number Of Dac's
8
Number Of Bits
24
Outputs And Type
8, Single Ended
Sampling Rate (per Second)
192k
Data Interface
Serial
Dac Type
Voltage
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
CS4384
Description/function
Audio D/A
Operating Supply Voltage
5 V
Product
Audio Modules
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
CS4384
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant, Contains lead / RoHS non-compliant
Other names
598-1525
DS620F1
5. REGISTER QUICK REFERENCE
Addr
0Ch Vol. Control B1
0Dh Mixing Control
01h Chip Revision
02h Mode Control
03h PCM Control
04h DSD Control
05h Filter Control
06h Invert Control
07h Group Control
08h Ramp and Mute
09h Mute Control
0Ah Mixing Control
0Bh Vol. Control A1
0Eh Vol. Control A2
0Fh Vol. Control B2
10h Mixing Control
12h Vol. Control B3
13h Mixing Control
11h
Pair 1 (AOUTx1)
Pair 2 (AOUTx1)
Pair 3 (AOUTx1)
Vol. Control A3
Pair 4 (AOUTx1)
Function
default
default
default
default
default
default
default
default
default
default
default
default
default
default
default
default
default
default
default
DSD_DIF2 DSD_DIF1 DSD_DIF0 DIR_DSD STATIC_D
MUTE_B4 MUTE_A4 MUTE_B3 MUTE_A3 MUTE_B2 MUTE_A2 MUTE_B1 MUTE_A1
A1_VOL7
B1_VOL7
A2_VOL7
B2_VOL7
A3_VOL7
B3_VOL7
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
INV_B4
PART4
CPEN
SZC1
DIF3
7
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
P1_DEM1 P1_DEM0 P1ATAPI4 P1ATAPI3
P2_DEM1 P2_DEM0 P2ATAPI4 P2ATAPI3
P3_DEM1 P3_DEM0 P3ATAPI4 P3ATAPI3
P4_DEM1 P4_DEM0 P4ATAPI4 P4ATAPI3
Reserved
A1_VOL6
B1_VOL6
A2_VOL6
B2_VOL6
A3_VOL6
B3_VOL6
FREEZE
INV_A4
MUTEC
PART3
SZC0
DIF2
6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DSD/PCM DAC4_DIS DAC3_DIS DAC2_DIS DAC1_DIS
Reserved
Reserved
A1_VOL5
B1_VOL5
A2_VOL5
B2_VOL5
A3_VOL5
B3_VOL5
RMP_UP
INV_B3
PART2
DIF1
5
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
A1_VOL4
B1_VOL4
A2_VOL4
B2_VOL4
A3_VOL4
B3_VOL4
Reserved
RMP_DN
P1_A=B
INV_A3
PART1
DIF0
4
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
Reserved
Reserved
A1_VOL3
B1_VOL3
A2_VOL3
B2_VOL3
A3_VOL3
B3_VOL3
PAMUTE
P2_A=B
INV_B2
PART0
SD
3
0
0
0
1
0
0
0
1
0
1
0
0
1
0
0
1
0
0
1
INVALID_D
P1ATAPI2
P2ATAPI2
P3ATAPI2
P4ATAPI2
Reserved
Reserved
A1_VOL2
B1_VOL2
A2_VOL2
B2_VOL2
A3_VOL2
B3_VOL2
DAMUTE
P3_A=B
INV_A2
REV2
SD
2
x
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
DSD_PM_
MUTE_P1 MUTE_P0
P1ATAPI1
P2ATAPI1
P3ATAPI1
P4ATAPI1
Reserved
A1_VOL1
B1_VOL1
A2_VOL1
B2_VOL1
A3_VOL1
B3_VOL1
P4_A=B
INV_B1
REV1
FM1
MD
1
x
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CS4384
DSD_PM_
SNGLVOL
P1ATAPI0
P2ATAPI0
P3ATAPI0
P4ATAPI0
FILT_SEL
A1_VOL0
B1_VOL0
A2_VOL0
B2_VOL0
A3_VOL0
B3_VOL0
INV_A1
REV0
PDN
FM0
EN
0
1
1
0
0
0
0
0
0
1
0
0
1
0
0
1
0
0
1
x
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