P89LPC917FDH NXP Semiconductors, P89LPC917FDH Datasheet - Page 38

• Manufacturer Part Number: P89LPC917FDH
• Description: MCU 8BIT 80C51 2K FLASH, TSSOP16
• Manufacturer: NXP Semiconductors

Specifications of P89LPC917FDH

• Controller Family/series: (8051) 8052
• Core Size: 8bit
• No. Of I/o's: 14
• Program Memory Size: 2KB
• Ram Memory Size: 256Byte
• Cpu Speed: 18MHz
• Oscillator Type: Internal Only
• No. Of Timers: 4
• No. Of Pwm: RoHS Compliant

NXP Semiconductors
P89LPC915_916_917_5
Product data sheet
8.14.1 Brownout detection
8.14.2 Power-on detection
8.15.1 Idle mode
8.15.2 Power-down mode
8.14 Power monitoring functions
8.15 Power reduction modes
All ports pins that can function as an output have slew rate controlled outputs to limit noise
generated by quickly switching output signals. The slew rate is factory-set to
approximately 10 ns rise and fall times.
The P89LPC915/916/917 incorporates power monitoring functions designed to prevent
incorrect operation during initial power-up and power loss or reduction during operation.
This is accomplished with two hardware functions: Power-on detect and brownout detect.
The brownout detect function determines if the power supply voltage drops below a
certain level. The default operation is for a brownout detection to cause a processor reset,
however it may alternatively be configured to generate an interrupt.
Brownout detection may be enabled or disabled in software.
If brownout detection is enabled the brownout condition occurs when V
brownout trip voltage, V
rises above V
can be below 2.7 V, BOE should be left in the unprogrammed state so that the device can
operate at 2.4 V, otherwise continuous brownout reset may prevent the device from
operating.
For correct activation of brownout detect, the V
Please see
The Power-on detect has a function similar to the brownout detect, but is designed to work
as power comes up initially, before the power supply voltage reaches a level where
brownout detect can work. The POF flag in the RSTSRC register is set to indicate an
initial power-up condition. The POF flag will remain set until cleared by software.
The P89LPC915/916/917 supports three different power reduction modes: Idle mode,
Power-down mode, and total Power-down mode.
Idle mode leaves peripherals running in order to allow them to activate the processor
when an interrupt is generated. Any enabled interrupt source or reset may terminate Idle
mode.
The Power-down mode stops the oscillator in order to minimize power consumption. The
P89LPC915/916/917 exits Power-down mode via any reset, or certain interrupts. In
Power-down mode, the power supply voltage may be reduced to the data retention
voltage V
entered. SFR contents are not guaranteed after V
it is highly recommended to wake-up the processor via reset in this case. V
raised to within the operating range before the Power-down mode is exited.
DDR
Table 15 “Static characteristics”
. This retains the RAM contents at the point where Power-down mode was
bo
. If the P89LPC915/916/917 device is to operate with a power supply that
Rev. 05 — 15 December 2009
bo
8-bit microcontrollers with accelerated two-clock 80C51 core
(see
Table 15 “Static
for specifications.
characteristics”), and is negated when V
DD
P89LPC915/916/917
DD
rise and fall times must be observed.
has been lowered to V
DD
© NXP B.V. 2009. All rights reserved.
falls below the
DDR
DD
must be
, therefore
38 of 75
DD