PIC16C770/SO Microchip Technology, PIC16C770/SO Datasheet - Page 69
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PIC16C770/SO
Manufacturer Part Number
PIC16C770/SO
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SOP,20PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16C770-ISO.pdf
(220 pages)
2.PIC16C770-ISO.pdf
(6 pages)
3.PIC16C770-ISO.pdf
(8 pages)
Specifications of PIC16C770/SO
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 6x12b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-SOIC (7.5mm Width)
Processor Series
PIC16C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C, SPI, SSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
3 bit
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
0 C
On-chip Adc
6 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164028 - MODULE SKT PROMATEII 20SOIC/DIP309-1013 - ADAPTER 20-SOIC TO 20-DIP309-1012 - ADAPTER 20-SOIC TO 20-DIP
Eeprom Size
-
Lead Free Status / Rohs Status
Details
- Current page: 69 of 220
- Download datasheet (4Mb)
REGISTER 9-2:
2002 Microchip Technology Inc.
bit 7
bit 6
bit 5
bit 4
SYNC SERIAL PORT CONTROL REGISTER (SSPCON: 14h)
WCOL: Write Collision Detect bit
Master Mode:
1 = A write to the SSPBUF register was attempted while the I
0 = No collision
Slave Mode:
1 = The SSPBUF register is written while it is still transmitting the previous word (must be
0 = No collision
SSPOV: Receive Overflow Indicator bit
In SPI mode
1 = A new byte is received while the SSPBUF register is still holding the previous data. In case
0 = No overflow
In I
1 = A byte is received while the SSPBUF register is still holding the previous byte. SSPOV is a
0 = No overflow
SSPEN: Synchronous Serial Port Enable bit
In both modes, when enabled, the I/O pins must be properly configured as input or output.
In SPI mode
1 = Enables serial port and configures SCK, SDO, SDI, and SS as the source of the serial port
0 = Disables serial port and configures these pins as I/O port pins
In I
1 = Enables the serial port and configures the SDA and SCL pins as the source of the serial
0 = Disables serial port and configures these pins as I/O port pins
CKP: Clock Polarity Select bit
In SPI mode
1 = IDLE state for clock is a high level
0 = IDLE state for clock is a low level
In I
1 = Enable clock
In I
Unused in this mode
bit 7
0 = Holds clock low (clock stretch) (used to ensure data setup time)
Legend:
R = Readable bit
- n = Value at POR
WCOL
R/W-0
2
2
2
2
transmission to be started
cleared in software)
of overflow, the data in SSPSR is lost. Overflow can only occur in Slave mode. In Slave
mode, the user must read the SSPBUF, even if only transmitting data, to avoid setting over-
flow. In Master mode, the overflow bit is not set since each new reception (and transmis-
sion) is initiated by writing to the SSPBUF register. (Must be cleared in software).
"don’t care" in Transmit mode. (Must be cleared in software).
pins
port pins
C mode
C mode
C Slave mode SCK release control
C Master mode
SSPOV
R/W-0
Advance Information
SSPEN
R/W-0
W = Writable bit
’1’ = Bit is set
R/W-0
CKP
PIC16C717/770/771
SSPM3
R/W-0
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
2
SSPM2
R/W-0
C conditions were not valid for a
x = Bit is unknown
SSPM1
R/W-0
DS41120B-page 67
SSPM0
R/W-0
bit 0
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