PIC16C770/SO Microchip Technology, PIC16C770/SO Datasheet - Page 62

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PIC16C770/SO

Manufacturer Part Number
PIC16C770/SO
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SOP,20PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr

Specifications of PIC16C770/SO

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 6x12b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-SOIC (7.5mm Width)
Processor Series
PIC16C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C, SPI, SSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
3 bit
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
0 C
On-chip Adc
6 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164028 - MODULE SKT PROMATEII 20SOIC/DIP309-1013 - ADAPTER 20-SOIC TO 20-DIP309-1012 - ADAPTER 20-SOIC TO 20-DIP
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
PIC16C717/770/771
In Full-Bridge Output mode, four pins are used as out-
puts; however, only two outputs are active at a time. In
the Forward mode, RB3/CCP1/P1A pin is continuously
active, and RB7/T1OSI/P1D pin is modulated. In the
Reverse mode, RB6/T1OSO/T1CKI/P1C pin is contin-
uously active, and RB5/SDO/P1B pin is modulated.
FIGURE 8-8:
DS41120B-page 60
Note 1: At this time, the TMR2 register is equal to the PR2 register.
FORWARD MODE
REVERSE MODE
P1A
P1B
P1C
P1D
P1A
P1B
P1C
P1D
2: Output signal is shown as asserted high.
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
FULL-BRIDGE PWM OUTPUT
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
(1)
(1)
Duty Cycle
Duty Cycle
Period
Period
P1A, P1B, P1C and P1D outputs are multiplexed with
PORTB<3> and PORTB<5:7> data latches. TRISB<3>
and TRISB<5:7> bits must be cleared to make the P1A,
P1B, P1C, and P1D pins output.
(1)
(1)
2002 Microchip Technology Inc.

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