CS43L43-KZZ Cirrus Logic Inc, CS43L43-KZZ Datasheet - Page 6

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CS43L43-KZZ

Manufacturer Part Number
CS43L43-KZZ
Description
IC,D/A CONVERTER,DUAL,16/18/20/24-BIT,TSSOP,16PIN
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of CS43L43-KZZ

Rohs Compliant
YES

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Part Number:
CS43L43-KZZ
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Quantity:
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3.0 APPLICATIONS
3.1 Sample Rate Range/Operational Mode Select
The device operates in one of two operational modes. Operation in either mode depends on the input sam-
ple rate and the ratio of the master clock to the left/right clock (see section 3.2). Sample rates outside the
specified range for each mode are not supported.
3.2 System Clocking
The device requires external generation of the master (MCLK) and left/right (LRCK) clocks. The device
also requires external generation of the serial clock (SCLK) if the internal serial clock is not used. The
LRCK, defined also as the input sample rate F
specified ratios. The specified ratios of MCLK to LRCK, along with several standard audio sample rates
and the required MCLK frequency, are illustrated in Tables 2-3.
*Requires MCLKDIV bit = 1 in the Mode Control 2 register (address 0Bh).
6
Sample Rate
Sample Rate
2kHz - 50kHz
50kHz - 100kHz
(kHz)
(kHz)
88.2
44.1
64
96
32
48
Input Sample Rate (F
12.2880
11.2896
8.1920
256x
11.2896
12.2880
8.1920
128x
Table 2. Single-Speed Mode Standard Frequencies
Table 3. Double-Speed Mode Standard Frequencies
Table 1. CS43L43 Operational Mode
S
)
12.2880
16.9344
18.4320
384x
s
, must be synchronously derived from MCLK according to
12.2880
16.9344
18.4320
192x
Single Speed Mode
Double Speed Mode
MCLK (MHz)
MCLK (MHz)
16.3840
22.5792
24.5760
512x
16.3840
22.5792
24.5760
256x*
MODE
33.8688
36.8640
24.5760
768x*
24.5760
33.8688
36.8640
384x*
CS43L43
45.1584
49.1520
1024x*
32.768
DS479PP3

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